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LM3S2616 Datasheet, PDF (170/753 Pages) Texas Instruments – Stellaris® LM3S2616 Microcontroller
System Control
5.2.2.2
1. External reset input pin (RST) assertion; see “External RST Pin” on page 171.
2. Power-on reset (POR); see “Power-On Reset (POR)” on page 170.
3. Internal brown-out (BOR) detector; see “Brown-Out Reset (BOR)” on page 172.
4. Software-initiated reset (with the software reset registers); see “Software Reset” on page 172.
5. A watchdog timer reset condition violation; see “Watchdog Timer Reset” on page 173.
6. MOSC failure; see “Main Oscillator Verification Failure” on page 173.
Table 5-2 provides a summary of results of the various reset operations.
Table 5-2. Reset Sources
Reset Source
Core Reset?
JTAG Reset?
On-Chip Peripherals Reset?
Power-On Reset
Yes
Yes
Yes
RST
Yes
Pin Config Only
Yes
Brown-Out Reset
Yes
No
Yes
Software System Request
Yes
No
Yes
Reseta
Software Peripheral Reset
No
No
Yesb
Watchdog Reset
Yes
No
Yes
MOSC Failure Reset
Yes
No
Yes
a. By using the SYSRESREQ bit in the ARM Cortex-M3 Application Interrupt and Reset Control (APINT) register
b. Programmable on a module-by-module basis using the Software Reset Control Registers.
After a reset, the Reset Cause (RESC) register is set with the reset cause. The bits in this register
are sticky and maintain their state across multiple reset sequences, except when an internal POR
is the cause, and then all the other bits in the RESC register are cleared except for the POR indicator.
Power-On Reset (POR)
Note: The power-on reset also resets the JTAG controller. An external reset does not.
The internal Power-On Reset (POR) circuit monitors the power supply voltage (VDD) and generates
a reset signal to all of the internal logic including JTAG when the power supply ramp reaches a
threshold value (VTH). The microcontroller must be operating within the specified operating parameters
when the on-chip power-on reset pulse is complete. The 3.3-V power supply to the microcontroller
must reach 3.0 V within 10 msec of VDD crossing 2.0 V to guarantee proper operation. For applications
that require the use of an external reset signal to hold the microcontroller in reset longer than the
internal POR, the RST input may be used as discussed in “External RST Pin” on page 171.
The Power-On Reset sequence is as follows:
1. The microcontroller waits for internal POR to go inactive.
2. The internal reset is released and the core loads from memory the initial stack pointer, the initial
program counter, and the first instruction designated by the program counter, and then begins
execution.
The internal POR is only active on the initial power-up of the microcontroller. The Power-On Reset
timing is shown in Figure 22-5 on page 696.
170
November 17, 2011
Texas Instruments-Production Data