LM3S2616 Datasheet, PDF (235/753 Pages) Texas Instruments – Stellaris® LM3S2616 Microcontroller

Stellaris® LM3S2616 Microcontroller
Register 34: Software Reset Control 2 (SRCR2), offset 0x048
Writes to this register are masked by the bits in the Device Capabilities 4 (DC4) register.
Software Reset Control 2 (SRCR2)
Base 0x400F.E000
Offset 0x048
Type R/W, reset 0x00000000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
UDMA
reserved
GPIOE GPIOD GPIOC GPIOB GPIOA
Type RO
RO
R/W
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:14
13
12:5
4
3
2
1
0
Name
reserved
UDMA
reserved
GPIOE
GPIOD
GPIOC
GPIOB
GPIOA
Type
RO
R/W
RO
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
UDMA Reset Control. Reset control for uDMA unit.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Port E Reset Control. Reset control for GPIO Port E.
Port D Reset Control. Reset control for GPIO Port D.
Port C Reset Control. Reset control for GPIO Port C.
Port B Reset Control. Reset control for GPIO Port B.
Port A Reset Control. Reset control for GPIO Port A.
November 17, 2011
235
Texas Instruments-Production Data