ADS54J20 Datasheet, PDF (33/81 Pages) Texas Instruments – Dual-Channel, 12-Bit, 1.0-GSPS, Analog-to-Digital Converter

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ADS54J20
SBAS766A – MAY 2016 – REVISED MAY 2016
Table 8 shows the timing requirements for the serial interface signals in Figure 68.
Table 8. SPI Timing Requirements
f_SCLK
t_SLOADS
t_SLOADH
t_DSU
t_DH
SCLK frequency (equal to 1 / t_SCLK)
SEN to SCLK setup time
SCLK to SEN hold time
SDIN setup time
SDIN hold time
MIN
TYP
MAX
UNIT
> dc
2
MHz
100
ns
100
ns
100
ns
100
ns
8.4.1.2 Serial Register Write: Analog Bank
The analog SPI bank contains two pages (the master and ADC pages). The internal register of the ADS54J20
analog SPI bank can be programmed by:
1. Driving the SEN pin low.
2. Initiating a serial interface cycle specifying the page address of the register whose content must be written.
– Master page: write address 0011h with 80h.
– ADC page: write address 0011h with 0Fh.
3. Writing the register content as shown in Figure 69. When a page is selected, multiple writes into the same
page can be done.
SDIN
00
R/W M
00
Register Address[11:0]
Register Data[7:0]
P CH A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
SCLK
SEN
RESET
Figure 69. Serial Register Write Timing Diagram
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