TLC320AD90C Datasheet, PDF (31/51 Pages) Texas Instruments – Stereo Audio Codec

2.5 Resetting the TLC320AD90C
The three types of TLC320AD90C resets include the following:
• A cold reset where all TLC320AD90C logic (registers included) is initialized to the default state.
This reset is accomplished by asserting RESET.
• A warm reset where the contents of the TLC320AD90C register set are left unaltered. This reset
is accomplished by asserting SYNC during an AC-Link power-down state.
• A register reset which only initializes the TLC320AD90C registers to their default states. See
Section 2.3, Software Interface, register 0h.
After signaling a reset to the TLC320AD90C, the digital controller should not attempt to play or capture audio
data until it has sampled a codec ready indication from the TLC320AD90C.
2.5.1 Cold Reset
A cold reset is achieved by asserting RESET for 1 µs. By driving RESET low, BIT_CLK and SDATA_OUT
are activated, or reactivated, and all TLC320AD90C control registers are initialized to default power-on reset
values.
RESET is an asynchronous input.
2.5.2 Warm Reset
The AC-Link can be put in a low-power consumption state (see Section 2.3, Software Interface). In this state,
all signals become inactive including BIT_CLK, and SYNC. A warm TLC320AD90C reset reactivates the
AC-Link without altering the current TLC320AD90C register values. A warm reset is signaled by driving
SYNC high for a minimum of 1 µs in the absence of BIT_CLK.
Within normal audio frames, SYNC is a synchronous TLC320AD90C input. However, in the absence of
BIT_CLK, SYNC is treated as an asynchronous input used in the generation of a warm reset to the
TLC320AD90C.
The TLC320AD90C does not respond with the activation of BIT_CLK until SYNC has been sampled low
again by the TLC320AD90C. This precludes the false detection of a new audio frame.
2.5.3 Reset From Test Mode
Once either of the two test modes have been entered, the TLC320AD90C must be issued another reset with
all AC-Link signals low to return to the normal operating mode.
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