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TLC6C598-Q1_16 Datasheet, PDF (3/24 Pages) Texas Instruments – Power Logic 8-Bit Shift Register LED Driver
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5 Pin Configuration and Functions
PW Package
16-Pin TSSOP
Top View
TLC6C598-Q1
SLIS142D – DECEMBER 2012 – REVISED SEPTEMBER 2016
D Package
16-Pin SOIC
Top View
VCC
1
SER_IN 2
DRAIN0 3
DRAIN1 4
DRAIN2 5
DRAIN3 6
CLR 7
G8
16
GND
VCC
1
15
SRCK
SER_IN 2
14
DRAIN7 DRAIN0 3
13
DRAIN6 DRAIN1 4
12
DRAIN5 DRAIN2 5
11
DRAIN4 DRAIN3 6
10
RCK
CLR 7
9
SER_OUT
G8
16
GND
15
SRCK
14
DRAIN7
13
DRAIN6
12
DRAIN5
11
DRAIN4
10
RCK
9
SER_OUT
PIN
NAME
NO.
CLR
7
DRAIN0
3
DRAIN1
4
DRAIN2
5
DRAIN3
6
DRAIN4
11
DRAIN5
12
DRAIN6
13
DRAIN7
14
G
8
GND
16
RCK
10
SER IN
2
SER OUT
9
SRCK
15
VCC
1
Pin Functions
I/O
DESCRIPTION
I
Shift register clear, active-low. The storage register transfers data to the output buffer
when CLR is high. Driving CLR low clears all the registers in the device.
O
Open-drain output, LED current-sink channel, connect to LED cathode
O
Open-drain output, LED current-sink channel, connect to LED cathode
O
Open-drain output, LED current-sink channel, connect to LED cathode
O
Open-drain output, LED current-sink channel, connect to LED cathode
O
Open-drain output, LED current-sink channel, connect to LED cathode
O
Open-drain output, LED current-sink channel, connect to LED cathode
O
Open-drain output, LED current-sink channel, connect to LED cathode
O
Open-drain output, LED current-sink channel, connect to LED cathode
I
Output enable, active-low. LED-channel enable and disable input pin. Having G low
enables all drain channels according to the output-latch register content. When high, all
channels are off.
—
Power ground, the ground reference pin for the device. This pin must connect to the
ground plane on the PCB.
I
Register clock. The data in each shift register stage transfers to the storage register at the
rising edge of RCK.
I
Serial data input. Data on SER IN loads into the internal register on each rising edge of
SRCK.
O
Serial data output of the 8-bit serial shift register. The purpose of this pin is to cascade
several devices on the serial bus.
I
Serial clock input. On each rising SRCK edge, data transfers from SER IN to the internal
serial shift registers.
I
Power supply pin for the device. TI recommends adding a 0.1-μF ceramic capacitor close
to the pin.
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