TL16PNP200A Datasheet, PDF (3/24 Pages) Texas Instruments – STANDALONE PLUG-AND-PLAY (PnP) CONTROLLER

TL16PNP200A
STANDALONE PLUG-AND-PLAY (PnP) CONTROLLER
functional block diagram
SLLS274A– APRIL1997 – REVISED MAY 1997
D7–D0
MCS1† (IOCS2),
MCS0† (IOCS3)
(INTR4–INTR2),
INTR1, INTR0
DMA_RQ1,
DMA_RQ0
DMA_ACK1,
DMA_ACK0
(IOCS4),
IOCS1, IOCS0
(OEN1), OEN0
IRQ3–IRQ7,
IRQ9–IRQ12,
IRQ14–IRQ15
(CDRQ4, CDRQ3),
CDRQ2–CDRQ0
(CDACK4–CDACK3),
CDACK2–CDACK0
A23–A16†, A15–A0
AEN
BALE†
IOR
IOW
RESET
28–31, 33–36
77, 78
(7–9),72, 73
70,71
66, 67
(2), 76–75
80, 79
60–50
40
11–26, 2–9
(3, 4), 47–49
Logical
Device
Decoder
Output
Enable
8
8
64
63
EEPROM 62
Controller ₆₅
69
SCS
SCLK
SIO
PNP_BUSY
SROM_BUSY
8
Card Control
8
Logical Device
8
Control
Logical Device
8
Configuration
8
(5, 6), 43–45
8
11–26, 2–9
8
40
Read-Data Port
80
Write-Data Port
38 Decoder _{Address Port}
39
41
Address
Register
LFSR
Key
Select
† _{Designates terminals for mode 0 only.}
NOTE A: Terminals in parentheses are for mode 1 operation only.
Enable
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