ONET8551T_16 Datasheet, PDF (3/16 Pages) Texas Instruments – 11.3-Gbps Limiting Transimpedance Amplifier

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ONET8551T
SLLSEI5 – OCTOBER 2013
VCC_OUT
VCC_IN
GND
FILTER 1
FILTER 2
IN
To voltage amplifier and output buffer
To TIA
R_F
TIA
AGC, RSSI,
and DC Offset
Cancellation
Voltage
Amplifier
RSSI_IB
CML Output
Buffer
OUT+
OUT±
BW0
BW1
RSSI_EB
Figure 2. Simplified Block Diagram of the ONET8551T Device
Figure 2 shows a simplified block diagram of the ONET8551T device.
The ONET8551T device consists of the signal path, supply filters, a control block for DC input bias, automatic
gain control (AGC), and received signal strength indication (RSSI). The RSSI provides the bias for the TIA stage
and the control for the AGC.
The signal path consists of a transimpedance amplifier stage, a voltage amplifier, and a CML output buffer. The
on-chip filter circuit provides a filtered VCC for the PIN photodiode and for the transimpedance amplifier.
The DC input bias circuit and automatic gain control use internal low pass filters to cancel the DC current on the
input and to adjust the transimpedance amplifier gain. Furthermore, circuitry is provided to monitor the received
signal strength.
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