MSP430G2230-EP Datasheet, PDF (3/40 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430G2230-EP
www.ti.com
SLAS863 – AUGUST 2012
Table 2. Terminal Functions⁽¹⁾
TERMINAL
NAME
NO.
I/O
D
DESCRIPTION
P1.2/
TA0.1/
A2
General-purpose digital I/O pin
2
I/O _{Timer_A, capture: CCI1A input, compare Out1 output}
ADC10 analog input A2
P1.5/
TA0.0/
A5/
SCLK
General-purpose digital I/O pin
3
I/O ^{Timer_A, compare Out0 output}
ADC10 analog input A5
USI: clock input in I2C mode; clock input/output in SPI mode
P1.6/
TA0.1/
A6/
SDO/
SCL
General-purpose digital I/O pin
Timer_A, capture: CCI1B input, compare: Out1 output
4
I/O _{ADC10 analog input A6}
USI: Data output in SPI mode
USI: I2C clock in I2C mode
P1.7/
A7/
SDI/
SDA
General-purpose digital I/O pin
5
I/O ^{ADC10 analog input A7}
USI: Data input in SPI mode
USI: Data input in I2C mode
RST/
NMI/
SBWTDIO
Reset input
6
I _{Nonmaskable interrupt input}
Spy-Bi-Wire test data input/output during programming and test
TEST/
SBWTCK
DVCC
DVSS
7
I ^{Selects test mode for JTAG pins on Port 1. The device protection fuse is connected to TEST.}
Spy-Bi-Wire test clock input during programming and test
1
Digital supply voltage
8
Digital ground reference
(1) The GPIOs P1.0, P1.1, P1.3, P1.4, P2.6, and P2.7 are implemented but not available on the device pinout. To avoid floating inputs,
these digital I/Os should be properly configured. The pullup or pulldown resistors of the unbounded P1.x GPIOs should be enabled, and
the VLO should be selected as the ACLK source (see the MSP430x2xx Family User's Guide (SLAU144)).
Copyright © 2012, Texas Instruments Incorporated
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