DRV104_16 Datasheet, PDF (3/26 Pages) Texas Instruments – 1.2A PWM High-Side Driver for Solenoids, Coils, Valves, Heaters, and Lamps

ELECTRICAL CHARACTERISTICS
At T_C = +25°C, V_S = V_PS = +24V, Load = 100Ω, 4.99kΩ Status OK flag pull-up to +5V, Boot capacitor = 470pF, Delay Adj Capacitor (C_D) = 100pF to GND, Osc
Freq Adj Resistor = 191kΩ to GND, Duty Cycle Adj Resistor = 147kΩ to GND, and Master and SYNC open, unless otherwise noted.
DRV104
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
OUTPUT
Output Saturation Voltage, Source
Current Limit⁽¹⁾⁽⁷⁾
Leakage Current
DELAY TO PWM⁽³⁾
Delay Equation⁽⁴⁾
Delay Time
Minimum Delay Time⁽⁵⁾
DUTY CYCLE ADJUST
Duty Cycle Range
Duty Cycle Accuracy
vs Supply Voltage
Nonlinearity⁽⁶⁾
DYNAMIC RESPONSE
Output Voltage Rise Time
Output Voltage Fall Time
SYNC Output Rise Time
SYNC Output Fall Time
Oscillator Frequency Range
Oscillator Frequency Accuracy
STATUS OK FLAG
Normal Operation
Fault⁽⁷⁾
Over-Current Flag: Set—Delay
INPUT⁽²⁾
V_INPUT Low
V_INPUT High
I_INPUT Low (output disabled)
I_INPUT High (output enabled)
Propagation Delay
(master mode)
MASTER INPUT
V_MSTR Low
V_MSTR High
I_MSTR Low (slave mode)
I_MSTR High (master mode)
SYNC INPUT
V_SYNC Low
V_SYNC High
I_MSTR Low (OUT disabled in slave mode)
I_MSTR High (OUT disabled in slave mode)
Propagation Delay
SYNC OUTPUT⁽⁹⁾
V_OL Sync
V_OH Sync
THERMAL SHUTDOWN
Junction Temperature
Shutdown
Reset from Shutdown
POWER SUPPLY
Specified Operating Voltage
Operating Voltage Range
Quiescent Current (V_S)
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance, θ_JA(8)
HTSSOP-14 with PowerPAD
I_O = 1A
I_O = 0.1A
DMOS Output Off, V_PS = V_S = 32V
DC to PWM Mode
C_D = 0.1µF
C_D = 0
50% Duty Cycle, 25kHz
50% Duty Cycle, V_S = V_PS = 8V to 32V
10% to 90% Duty Cycle
V_O = 10% to 90% of V_PS
V_O = 90% to 10% of V_PS
V_SYNC = 10% to 90%
V_SYNC = 10% to 90%
External Adjust
R_FREQ = 191kΩ
20kΩ Pull-Up to +5V
4.99kΩ Pull-Up to +5V
V_INPUT = 0V
V_INPUT = +4.5V
On to Off and Off to On, INPUT to OUT
On to Off and Off to On, INPUT to SYNC
V_INPUT = 0V
V_INPUT = +4.5V
V_INPUT = 0V
V_INPUT = +4.5V
On to Off and Off to On, SYNC to OUT (slave)
I_SYNC = 100µA (sinking)
I_SYNC = 100µA (sourcing)
I_O = 0
+0.45
+0.65
+0.05
+0.07
1.2
2.0
2.6
1
10
Delay to PWM ≈ C_D • 10⁶(C_D in F • 1.24)
60
80
100
18
10 to 90
±2
±5
±2
1
1
2
0.2
2
0.5
2
0.5
2
0.5 to 100
20
25
30
+4.5
+5
+0.45
+0.6
5
0
+1.2
+2.2
+5.5
0.01
1
0.01
1
2.2
0.4
0
+1.2
+2.2
+5.5
15
25
15
25
0
+1.2
+2.2
+5.5
0.01
1
0.01
1
2.2
0.1
0.3
+4.0
+4.2
+160
+140
+24
+8
+32
0.6
1
–40
+85
–55
+125
–65
+150
37.5
V
V
A
µA
s
ms
µs
%
%
%
% FSR
µs
µs
µs
µs
kHz
kHz
V
V
µs
V
V
µA
µA
µs
µs
V
V
µA
µA
V
V
µA
µA
µs
V
V
°C
°C
V
V
mA
°C
°C
°C
°C/W
NOTES: (1) Output current resets to zero when current limit is reached. (2) Logic high enables output (normal operation). (3) Constant dc output to PWM (Pulse-
Width Modulated) time. (4) Maximum delay is determined by an external capacitor. Pulling the Delay Adjust Pin low corresponds to an infinite (continuous) delay.
(5) Connecting the Delay Adjust pin to +5V reduces delay time to 3µs. (6) V_IN at pin 1 to percent of duty cycle at pins 6 and 7. (7) Flag indicates fault from over-
temperature or over-current conditions. (8) θ_JA = 37.5°C/W measured on JEDEC standard test board. θ_JC = 2.07°C/W. (9) SYNC output follows power output in
master mode. Power output follows SYNC input in slave mode.
DRV104
3
SBVS036B
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