DRV104_16 Datasheet, PDF (12/26 Pages) Texas Instruments – 1.2A PWM High-Side Driver for Solenoids, Coils, Valves, Heaters, and Lamps

At very high oscillator frequencies, the energy in the DRV104’s
linear rise and fall times can become significant and cause
an increase in P_D.
THERMAL PROTECTION
Power dissipated in the DRV104 causes its internal junction
temperature to rise. The DRV104 has an on-chip thermal
shutdown circuitry that protects the IC from damage. The
thermal protection circuitry disables the output when the
junction temperature reaches approximately +160°C, allow-
ing the device to cool. When the junction temperature cools
to approximately +140°C, the output circuitry is again en-
abled. Depending on load and signal conditions, the thermal
protection circuit may cycle on and off. This limits the dissi-
pation of the driver but may have an undesirable effect on the
load.
Any tendency to activate the thermal protection circuit indi-
cates excessive power dissipation or an inadequate heat
sink. For reliable operation, junction temperature should be
limited to a maximum of +125°C. To estimate the margin of
safety in a complete design (including heat-sink), increase
the ambient temperature until the thermal protection is trig-
gered. Use worst-case load and signal conditions. For good
reliability, thermal protection should trigger more than 35°C
above the maximum expected ambient condition of your
application. This produces a junction temperature of 125°C
at the maximum expected ambient condition.
The internal protection circuitry of the DRV104 is designed to
protect against overload conditions. It is not intended to
replace proper heat sinking. Continuously running the DRV104
into thermal shutdown will degrade device reliability.
HEAT SINKING
Most applications do not require a heat-sink to assure that
the maximum operating junction temperature (125°C) is not
exceeded. However, junction temperature should be kept as
low as possible for increased reliability. Junction temperature
can be determined according to the following equations:
T_J = T_A + P_Dθ_JA
(3)
θ_JA = θ_JC + θ_CH + θ_HA
(4)
where:
T_J = Junction Temperature (°C)
T_A = Ambient Temperature (°C)
P_D = Power Dissipated (W)
θ_JC = Junction-to-Case Thermal Resistance (°C/W)
θ_CH = Case-to-Heat Sink Thermal Resistance (°C/W)
θ_HA = Heat Sink-to-Ambient Thermal Resistance (°C/W)
θ_JA = Junction-to-Air Thermal Resistance (°C/W)
Using a heat sink significantly increases the maximum allow-
able power dissipation at a given ambient temperature.
The answer to the question of selecting a heat-sink lies in
determining the power dissipated by the DRV104. For DC
output into a purely resistive load, power dissipation is simply
the load current times the voltage developed across the
conducting output transistor times the duty cycle. Other loads
are not as simple. (For further information on calculating
power dissipation, refer to Application Bulletin SBFA002,
available at www.ti.com.) Once power dissipation for an
application is known, the proper heat-sink can be selected.
Heat-Sink Selection Example
A PowerPAD HTSSOP-14 package dissipates 2W. The maxi-
mum expected ambient temperature is 35°C. Find the proper
heat-sink to keep the junction temperature below 125°C.
Combining Equations 1 and 2 gives:
T_J = T_A + P_D(θ_JC + θ_CH + θ_HA)
(5)
T_J, T_A, and P_D are given. θ_JC is provided in the specification
table: 2.07°C/W. θ_CH depends on heat sink size, area, and
material used. Semiconductor package type and mounting can
also affect θ_CH. A typical θ_CH for a soldered-in-place PowerPAD
HTSSOP-14 package is 2°C/W. Now, solving for θ_HA:
( ) θ_HA
=
T_J – T_A
P_D
–
θ_JC + θ_CH
θ
HA⁼
125°C – 35°C
2W
–
(2.07°C
/
W
+
2°C
/
W)
(6)
θ _HA= 40.9°C / W
To maintain junction temperature below 125°C, the heat-sink
selected must have a θ_HA less than 40.9°C/W. In other
words, the heat-sink temperature rise above ambient tem-
perature must be less than 81.8°C (40.9°C/W • 2W).
Another variable to consider is natural convection versus
forced convection air flow. Forced-air cooling by a small fan
can lower θ_CA (θ_CH + θ_HA) dramatically.
As mentioned above, once a heat-sink has been selected,
the complete design should be tested under worst-case load
and signal conditions to ensure proper thermal protection.
RFI/EMI
Any switching system can generate noise and interference
by radiation or conduction. The DRV104 is designed with
controlled slew rate current switching to reduce these effects.
By slowing the rise time of the output to 1µs, much lower
switching noise is generated.
Radiation from the DRV104-to-load wiring (the antenna ef-
fect) can be minimized by using twisted pair cable or by
shielding. Good PCB ground planes are recommended for
low noise and good heat dissipation. Refer to the Bypassing
section for notes on placement of the flyback diode.
12
DRV104
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SBVS036B