DRV104_16 Datasheet, PDF (10/26 Pages) Texas Instruments – 1.2A PWM High-Side Driver for Solenoids, Coils, Valves, Heaters, and Lamps

The Duty Cycle Adjust pin is internally driven by an oscillator
frequency dependent current source and connects to the
input of a comparator, as shown in Figure 8. The DRV104’s
PWM adjustment is inherently monotonic; that is, a de-
creased voltage (or resistor value) always produces an
decreased duty cycle.
OSC
+V_S
2.75 • I_REF
R_PWM
3.9V
1.3V
FIGURE 8. Simplified Duty Cycle Adjust Input.
STATUS OK FLAG
The Status OK Flag (pin 13) provides a fault indication for
over-current and thermal shutdown conditions. During a fault
condition, the Status OK Flag output is driven Low (pin
voltage typically drops to 0.45V). A pull-up resistor, as shown
in Figure 9, is required to interface with standard logic. Figure
9 also gives an example of a non-latching fault monitoring
circuit, while Figure 10 provides a latching version. The
Status OK Flag pin can sink up to 10mA, sufficient to drive
external logic circuitry, a reed relay, or an LED (as shown in
Figure 11) to indicate when a fault has occurred. In addition,
the Status OK Flag pin can be used to turn off other
DRV104s in a system for chain fault protection.
Over-Current Fault
An over-current fault occurs when the PWM peak output
current is greater than typically 2.0A. The Status OK flag is
not latched. Since current during PWM mode is switched on
and off, the Status OK flag output will be modulated with
PWM timing (see the Status OK flag waveforms in the
Typical Characteristics).
Avoid adding capacitance to pins 6, 7 (OUT) because this
can cause momentary current limiting.
Over-Temperature Fault
A thermal fault occurs when the die reaches approximately
160°C, producing an effect similar to pulling the input low.
Internal shutdown circuitry disables the output. The Status
OK Flag is latched in the Low state (fault condition) until the
die has cooled to approximately 140°C.
+5V
5kΩ
Pull-Up
TTL or HCT
Status OK Flag 13
Thermal Shutdown
Over-Current
PWM
DRV104
8, 9
V_PS
6, 7
OUT
FIGURE 9. Non-Latching Fault Monitoring Circuit.
+5V
OK
OK
OK Reset
74XX76A
V_S
Q
J
Q
CLR CLK
GND K
20kΩ
(1)
Status OK Flag 13
Thermal Shutdown
Over-Current
PWM
DRV104
8, 9
V_PS
6, 7
OUT
NOTE: (1) A small capacitor (10pF) may be required in noisy environments.
FIGURE 10. Latching Fault Monitoring Circuit.
+5V
5kΩ
Status OK Flag 13
(LED)
HLMP-Q156
8, 9
V_PS
Thermal Shutdown
Over-Current
PWM
DRV104
6, 7
OUT
FIGURE 11. Using an LED to Indicate a Fault Condition.
10
DRV104
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