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CD74HCT574-EP Datasheet, PDF (3/14 Pages) Texas Instruments – HIGH-SPEED CMOS LOGIC OCTAL D-TYPE FLIP-FLOP 3-STATE,POSITIVE-EDGE TRIGGERED | |||
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CD74HCT574ÄEP
HIGHÄSPEED CMOS LOGIC OCTAL DÄTYPE FLIPÄFLOP
3ÄSTATE, POSITIVEÄEDGE TRIGGERED
SCLS571 â FEBRUARY 2004
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)â
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . â0.5 V to 7 V
Input clamp current, IIK (VI < â0.5 V or VI > VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < â0.5 V or VO > VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Drain current per output, IO (VO > â0.5 V or VO < VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Output source or sink current per output, IO (VO > â0.5 V or VO < VCC + 0.5 V) . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND, ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): M package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Lead temperature (during soldering):
At distance 1/16 ± 1/32 inch (1,59 ± 0,79 mm) from case for 10 s max . . . . . . . . . . . . . . . . . . . . . . . 300°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . â65°C to 150°C
â Stresses beyond those listed under âabsolute maximum ratingsâ may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under ârecommended operating conditionsâ is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages referenced to GND unless otherwise specified.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN MAX UNIT
VCC Supply voltage
4.5 5.5 V
VIH High-level input voltage
VCC = 4.5 V to 5.5 V
2
V
VIL Low-level input voltage
VCC = 4.5 V to 5.5 V
0.8 V
VI Input voltage
0 VCC V
VO Output voltage
0 VCC V
VCC = 2 V
0 1000
tt
Input transition (rise and fall) time
VCC = 4.5 V
0 500 ns
VCC = 6 V
0 400
TA Operating free-air temperature
â40 125 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
⢠POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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