LM3S9D92_16 Datasheet, PDF (295/1412 Pages) Texas Instruments – Stellaris LM3S9D92 Microcontroller

Stellaris^® LM3S9D92 Microcontroller
Register 37: Software Reset Control 1 (SRCR1), offset 0x044
This register allows individual modules to be reset. Writes to this register are masked by the bits in
the Device Capabilities 2 (DC2) register.
Software Reset Control 1 (SRCR1)
Base 0x400F.E000
Offset 0x044
Type R/W, reset 0x00000000
31
30
29
28
27
26
25
24
reserved EPI0 reserved I2S0 reserved COMP2 COMP1 COMP0
Type RO
R/W
RO
R/W
RO
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
15
reserved
Type RO
Reset
0
14
I2C1
R/W
0
13
reserved
RO
0
12
I2C0
R/W
0
11
10
reserved
RO
RO
0
0
9
QEI1
R/W
0
8
QEI0
R/W
0
23
22
21
reserved
RO
RO
RO
0
0
0
7
6
reserved
RO
RO
0
0
5
SSI1
R/W
0
20
19
18
17
16
TIMER3 TIMER2 TIMER1 TIMER0
RO
R/W
R/W
R/W
R/W
0
0
0
0
0
4
SSI0
R/W
0
3
2
1
0
reserved UART2 UART1 UART0
RO
R/W
R/W
R/W
0
0
0
0
Bit/Field
31
30
29
28
27
26
25
24
Name
reserved
EPI0
reserved
I2S0
reserved
COMP2
COMP1
COMP0
Type
RO
R/W
RO
R/W
RO
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
EPI0 Reset Control
When this bit is set, EPI module 0 is reset. All internal data is lost and
the registers are returned to their reset states. This bit must be manually
cleared after being set.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I2S0 Reset Control
When this bit is set, I2S module 0 is reset. All internal data is lost and
the registers are returned to their reset states. This bit must be manually
cleared after being set.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Analog Comp 2 Reset Control
When this bit is set, Analog Comparator module 2 is reset. All internal
data is lost and the registers are returned to their reset states. This bit
must be manually cleared after being set.
Analog Comp 1 Reset Control
When this bit is set, Analog Comparator module 1 is reset. All internal
data is lost and the registers are returned to their reset states. This bit
must be manually cleared after being set.
Analog Comp 0 Reset Control
When this bit is set, Analog Comparator module 0 is reset. All internal
data is lost and the registers are returned to their reset states. This bit
must be manually cleared after being set.
July 03, 2014
295
Texas Instruments-Production Data