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LM3S9D92_16 Datasheet, PDF (1281/1412 Pages) Texas Instruments – Stellaris LM3S9D92 Microcontroller
Stellaris® LM3S9D92 Microcontroller
Table 24-7. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Typea Description
PH0
I/O
TTL
GPIO port H bit 0.
CCP6
I/O
TTL
Capture/Compare/PWM 6.
C9
EPI0S6
I/O
TTL
EPI module 0 signal 6.
PWM2
O
TTL
PWM 2. This signal is controlled by PWM Generator 1.
PWM4
O
TTL
PWM 4. This signal is controlled by PWM Generator 2.
PG7
I/O
TTL
GPIO port G bit 7.
CCP5
I/O
TTL
Capture/Compare/PWM 5.
C10
EPI0S31
I/O
TTL
EPI module 0 signal 31.
PWM7
O
TTL
PWM 7. This signal is controlled by PWM Generator 3.
PhB1
I
TTL
QEI module 1 phase B.
C11
USB0DM
I/O
Analog Bidirectional differential data pin (D- per USB specification) for
USB0.
C12
USB0DP
I/O
Analog Bidirectional differential data pin (D+ per USB specification) for
USB0.
D1
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
D2
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
VDDC
D3
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals. The voltage on this pin is
1.3 V and is supplied by the on-chip LDO. The VDDC pins should
only be connected to the LDO pin and an external capacitor as
specified in Table 26-6 on page 1322 .
PH3
I/O
TTL
GPIO port H bit 3.
EPI0S0
I/O
TTL
EPI module 0 signal 0.
D10
Fault0
PhB0
I
TTL
PWM Fault 0.
I
TTL
QEI module 0 phase B.
USB0EPEN
O
TTL
Optionally used in Host mode to control an external power source
to supply power to the USB bus.
PH2
I/O
TTL
GPIO port H bit 2.
C1o
O
TTL
Analog comparator 1 output.
D11
EPI0S1
I/O
TTL
EPI module 0 signal 1.
Fault3
I
TTL
PWM Fault 3.
IDX1
I
TTL
QEI module 1 index.
PB1
I/O
TTL
GPIO port B bit 1. This pin is not 5-V tolerant.
CCP1
I/O
TTL
Capture/Compare/PWM 1.
CCP2
I/O
TTL
Capture/Compare/PWM 2.
PWM3
D12
U1Tx
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
USB0VBUS
I/O
Analog This signal is used during the session request protocol. This signal
allows the USB PHY to both sense the voltage level of VBUS, and
pull up VBUS momentarily during VBUS pulsing.
E1
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
E2
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
July 03, 2014
Texas Instruments-Production Data
1281