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THS4031_16 Datasheet, PDF (29/47 Pages) Texas Instruments – THS403x 100-MHz Low-Noise High-Speed Amplifiers
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Layout Example (continued)
VCC+
THS4031, THS4032
SLOS224H – JULY 1999 – REVISED JUNE 2016
C3
0.1 µF
+ C2
6.8 µF
IN +
R3
49.9 Ω
R2
301 Ω
IN −
R4
49.9 Ω
R4
301 Ω
C4
0.1 µF
NULL
+
THS4031
_
NULL
R5
49.9 Ω
C1
+ 6.8 µF
VCC −
OUT
Figure 65. THS4031 Evaluation Board
12.3 General PowerPAD™ Design Considerations
The THS403x is available in a thermally-enhanced DGN package, which is a member of the PowerPAD™ family
of packages. This package is constructed using a downset leadframe upon which the die is mounted [see
Figure 66(a) and Figure 66(b)]. This arrangement results in the leadframe being exposed as a thermal pad on
the underside of the package [see Figure 66(c)]. Because this thermal pad has direct thermal contact with the
die, excellent thermal performance can be achieved by providing a good thermal path away from the thermal
pad.
The PowerPAD™ package allows for both assembly and thermal management in one manufacturing operation.
During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be
soldered to a copper area underneath the package. Through the use of thermal paths within this copper area,
heat can be conducted away from the package into either a ground plane or other heat-dissipating device.
The PowerPAD™ package represents a breakthrough in combining the small area and ease of assembly of
surface mount with the heretofore awkward mechanical methods of heatsinking.
Copyright © 1999–2016, Texas Instruments Incorporated
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