THS4031_16 Datasheet, PDF (23/47 Pages) Texas Instruments – THS403x 100-MHz Low-Noise High-Speed Amplifiers

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THS4031, THS4032
SLOS224H – JULY 1999 – REVISED JUNE 2016
Table 3. Recommended Feedback Resistors
GAIN
1
2
–1
5
R_f for V_CC = ±15 V and ±5 V
50 Ω
300 Ω
360 Ω
3.3 kΩ (low stray-c PCB only)
9.3.3 Driving a Capacitive Load
Driving capacitive loads with high-performance amplifiers is not a problem as long as certain precautions are
taken. The first is to realize that the THS403x has been internally compensated to maximize its bandwidth and
slew-rate performance. When the amplifier is compensated in this manner, capacitive loading directly on the
output will decrease the phase margin of the device leading to high-frequency ringing or oscillations. Therefore,
for capacitive loads of greater than 10 pF, TI recommends placing a resistor in series with the output of the
amplifier, as shown in Figure 55. A minimum value of 20 Ω should work well for most applications. For example,
in 75-Ω transmission systems, setting the series resistor value to 75 Ω both isolates any capacitance loading and
provides the proper line impedance matching at the source end.
360 Ω
Input
360 Ω
_
THS403x
+
20 Ω
Output
C_LOAD
Figure 55. Driving a Capacitive Load
9.3.4 Offset Voltage
The output offset voltage (V_OO) is the sum of the input offset voltage (V_IO) and both input bias currents (I_IB) times
the corresponding gains. The following schematic and formula shown in Figure 56 can be used to calculate the
output offset voltage:
Figure 56. Output Offset Voltage Model
9.3.5 General Configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required.
The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see
Figure 57).
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