ADS58C48_14 Datasheet, PDF (29/71 Pages) Texas Instruments – Quad Channel IF Receiver with SNRBoost 3G

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PIN CONFIGURATION (CMOS INTERFACE)
ADS58C48
SLAS689 – MAY 2010
DRVDD
CHB_D9
CHB_D10
DNC
CHA_D0
CHA_D1
CHA_D2
CHA_D3
CHA_D4
CHA_D5
CHA_D6
CHA_D7
CHA_D8
CHA_D9
CHA_D10
SDOUT
RESET
SCLK
SDATA
SEN
80 79 78 77 76 ₇₅ 74 _{73 72} 71 70 69 68 67 66 65 64 63 62 61
1
60
2
59
3
58
PAD IS CONNECTED TO GND
4
57
5
56
159-002
6
55
7
54
8
53
9
52
10
51
11
ADS58C48
50
12
49
13
48
14
47
15
46
16
45
17
44
18
43
19
42
20
41
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
DRVDD
CHC_D4
CHC_D3
CHC_D2
CHC_D1
CHC_D0
DNC
CHD_D10
CHD_D9
CHD_D8
CHD_D7
CHD_D6
CHD_D5
CHD_D4
CHD_D3
CHD_D2
CHD_D1
CHD_D0
DNC
SNRB_1
PIN ASSIGNMENTS (CMOS MODE)
PIN NAME
AVDD
1.8 V, analog power supply
DESCRIPTION
CLKP,
CLKM
INA_P,
INA_M
INB_P,
INB_M
Differential clock input
Differential analog input, Channel A
Differential analog input, Channel B
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s) :ADS58C48
P0027-06
TYPE
I
I
PIN
NUMBER
22, 25, 28, 30,
33, 36, 39
31, 32
NUMBER
OF PINS
7
2
I
23, 24
2
I
26, 27
2
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