ADS58C48_14 Datasheet, PDF (2/71 Pages) Texas Instruments – Quad Channel IF Receiver with SNRBoost 3G

ADS58C48
SLAS689 – MAY 2010
www.ti.com
IND_P
IND_M
INC_P
INC_M
CLKP
CLKM
INB_P
INB_M
INA_P
INA_M
CM
CHANNEL D
14 bit
ADC
Digital Processing
Block
SNRBoost
DDR
SERIALIZER
11 bit
CHANNEL C
14 bit
ADC
Digital Processing
Block
SNRBoost
DDR
SERIALIZER
11 bit
CHD<0>_P/M
CHD<2>_P/M
CHD<4>_P/M
CHD<6>_P/M
CHD<8>_P/M
CHD<10>_P/M
CHC<0>_P/M
CHC<2>_P/M
CHC<4>_P/M
CHC<6>_P/M
CHC<8>_P/M
CHC<10>_P/M
CLOCKGEN
CHANNEL B
14 bit
ADC
Digital Processing
Block
SNRBoost
DDR
SERIALIZER
11 bit
OUTPUT
CLOCK
BUFFER
CHANNEL A
14 bit
ADC
Digital Processing
Block
SNRBoost
DDR
SERIALIZER
11bit
CLKOUTP/M
CHB<0>_P/M
CHB<2>_P/M
CHB<4>_P/M
CHB<6>_P/M
CHB<8>_P/M
CHB<10>_P/M
CHA<0>_P/M
CHA<2>_P/M
CHA<4>_P/M
CHA<6>_P/M
CHA<8>_P/M
CHA<10>_P/M
REFERENCE
CONTROL
INTERFACE
ADS58C48
Figure 1. ADS58C48 Block Diagram (LVDS interface)
B0397-01
2
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