CP3BT26 Datasheet, PDF (286/375 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with Bluetooth-R, USB, and CAN Interfaces

CP3BT26
SNOSAE5D – FEBRUARY 2007 – REVISED DECEMBER 2013
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Pulse Accumulate Mode
The counter can also be configured to count prescaler output clock pulses when the TB input is high and
not count when the TB input is low, as illustrated in Figure 26-3. The resulting count is an indicator of the
cumulative time that the TB input is high. This is called the “pulse-accumulate” mode. In this mode, an
AND gate generates a clock signal for the counter whenever a prescaler clock pulse is generated and the
TB input is high. (The polarity of the TB signal is programmable, so the counter can count when the TB
input is low rather than high.) The pulse-accumulate mode is not available in the capture modes (modes 2
and 4) because the TB pin is used as one of the two capture inputs.
Figure 26-3. Pulse-Accumulate Mode
Slow Clock
The Slow Clock is generated by the Triple Clock and Reset module. The clock source is either the divided
fast clock or the external 32.768 kHz crystal oscillator (if available and selected). The Slow Clock can be
used as the clock source for the two 16-bit counters. Because the Slow Clock can be asynchronous to the
System Clock, a circuit is provided to synchronize the clock signal to the high-frequency System Clock
before it is used for clocking the counters. The synchronization circuit requires that the Slow Clock operate
at no more than one-fourth the speed of the System Clock.
Limitations in Low-Power Modes
The Power Save mode uses the Slow Clock as the System Clock. In this mode, the Slow Clock cannot be
used as a clock source for the timers because that would drive both clocks at the same frequency, and the
clock ratio needed for synchronization to the System Clock would not be maintained. However, the
External Event Clock and Pulse Accumulate Mode will still work, as long as the external event pulses are
at least the size of the whole slow-clock period. Using the prescaled System Clock will also work, but at a
much slower rate than the original System Clock.
Idle and Halt modes stop the System Clock (the high-frequency and/or low-frequency clock) completely. If
the System Clock is stopped, the timer stops counting until the System Clock resumes operation.
In the Idle or Halt mode, the System Clock stops completely, which stops the operation of the timers. In
that case, the timers stop counting until the System Clock resumes operation.
286 MULTI-FUNCTION TIMER
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