CP3BT26 Datasheet, PDF (238/375 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with Bluetooth-R, USB, and CAN Interfaces

CP3BT26
SNOSAE5D – FEBRUARY 2007 – REVISED DECEMBER 2013
www.ti.com
22.2.2 Synchronous Mode
The synchronous mode of the UART enables the device to communicate with other devices using three
communication signals: transmit, receive, and clock. In this mode, data bits are transferred synchronously
with the UART clock signal. Data bits are transmitted on the rising edges and received on the falling
edges of the clock signal, as shown in Figure 22-3. Data bytes are transmitted and received least
significant bit (LSB) first.
Figure 22-3. UART Synchronous Communication
In synchronous mode, the transmit shift register (TSFT) and the transmit buffer (UnTBUF) double-buffer
the data for transmission. To transmit a character, a data byte is loaded in the UnTBUF register. The data
is then transferred to the TSFT register. The TSFT register shifts out one bit of the current character, LSB
first, on each rising edge of the clock. While the TSFT is shifting out the current character on the TXD pin,
the UnTBUF register may be loaded by software with the next byte to be transmitted. When the TSFT
finishes transmission of the last stop bit within the current frame, the contents of UnTBUF are transferred
to the TSFT register and the Transmit Buffer Empty bit (UTBE) is set. The UTBE bit is automatically reset
by the UART when software loads a new character into the UnTBUF register. During transmission, the
UXMIP bit is set by the UART. This bit is cleared only after the UART hassent the last frame bit of the
current character and the UnTBUF register is empty. The receive shift register (RSFT) and the receive
buffer (URBUF) double-buffer the data being received. Serial data received on the RXD pin is shifted into
the RSFT register on the first falling edge of the clock. Each subsequent falling edge of the clock causes
an additional bit to be shifted into the RSFT register. The UART assumes a complete character has been
received after the correct number of rising edges on CKX (based on the selected frame format) have been
detected. On receiving a complete character, the contents of the RSFT register are copied into the
UnRBUF register and the Receive Buffer Full bit (URBF) is set. The URBF bit is automatically cleared
when software reads the character from the UnRBUF register.
The transmitter and receiver may be clocked by either an external source provided to the CKX pin or the
internal baud rate generator. In the latter case, the clock signal is placed on the CKX pin as an output.
22.2.3 Attention Mode
The Attention mode is available for networking this device with other processors. This mode requires the
9-bit data format with no parity. The number of start bits and number of stop bits are programmable. In this
mode, two types of 9-bit characters are sent on the network: address characters consisting of 8 address
bits and a 1 in the ninth bit position and data characters consisting of 8 data bits and a 0 in the ninth bit
position.
238 UART MODULES
Submit Documentation Feedback
Product Folder Links: CP3BT26
Copyright © 2007–2013, Texas Instruments Incorporated