LM3687 Datasheet, PDF (28/35 Pages) National Semiconductor (TI) – Step-Down DC-DC Converter with Integrated Low Dropout Regulator and Startup Mode

LM3687
SNVS473A – DECEMBER 2007 – REVISED JULY 2008
www.ti.com
evenly and that the device solders level to the board. In particular, special attention must be paid to the pads for
bumps A1, A2, C1 and B3, because PGND, SGND, V_BATT and V_{IN_LIN} are typically connected to large copper
planes, inadequate thermal relief can result in late or inadequate re-flow of these bumps. The micro SMD
package is optimized for the smallest possible size in applications with red or infrared opaque cases. Because
the micro SMD package lacks the plastic encapsulation characteristic of larger devices, it is vulnerable to light.
Backside metallization and/or epoxy coating, along with frontside shading by the printed circuit board, reduce this
sensitivity. However, the package has exposed die edges. In particular, micro SMD devices are sensitive to light,
in the red and infrared range, shining on the package’s exposed die edges.
BOARD LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance
of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss
in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or
instability. Good layout for the LM3687 can be implemented by following a few simple design rules below. Refer
to Figure 10 for top layer board layout.
1. Place the LM3687, inductor and filter capacitor close together and make the traces short. The traces
between these components carry relatively high switching currents and act as antennas. Following this rule
reduces radiated noise. Special care must be given to place the input filter capacitor very close to the V_BATT
and PGND pin. Place the output capacitor of the linear regulator close to the output pin.
2. Arrange the components so that the switching current loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor through the LM3687 and inductor to the output filter
capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled
up from ground through the LM3687 by the inductor to the output filter capacitor and then back through
ground forming a second current loop. Routing these loops so the current curls in the same direction
prevents magnetic field reversal between the two half-cycles and reduces radiated noise.
3. Connect the ground pins of the LM3687 and filter capacitors together using generous component-side
copper fill as a pseudo-ground plane. Then, connect this to the ground-plane (if one is used) with several
vias. This reduces ground-plane noise by preventing the switching currents from circulating through the
ground plane. It also reduces ground bounce at the LM3687 by giving it a low impedance ground connection.
Route SGND to the ground-plane by a separate trace.
4. Use wide traces between the power components and for power connections to the DC-DC converter circuit.
This reduces voltage errors caused by resistive losses across the traces.
5. Route noise sensitive traces, such as the voltage feedback path (FB_DCDC), away from noisy traces
between the power components. The voltage feedback trace must remain close to the LM3687 circuit and
should be direct but should be routed opposite to noisy components. This reduces EMI radiated onto the DC-
DC converter’s own voltage feedback trace. A good approach is to route the feedback trace on another layer
and to have a ground plane between the top layer and layer on which the feedback trace is routed.
6. Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocks
and other noisy circuitry. Interference with noise sensitive circuitry in the system can be reduced through
distance.
In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board,
arrange the CMOS digital circuitry around it (since this also generates noise), and then place sensitive
preamplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a
metal pan and power to it is postregulated to reduce conducted noise, a good field of application for the on-chip
low-dropout linear regulator.
28
Submit Documentation Feedback
Product Folder Links: LM3687
Copyright © 2007–2008, Texas Instruments Incorporated