LM3687 Datasheet, PDF (21/35 Pages) National Semiconductor (TI) – Step-Down DC-DC Converter with Integrated Low Dropout Regulator and Startup Mode

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LM3687
SNVS473A – DECEMBER 2007 – REVISED JULY 2008
PFM Mode at Light Load
Load current
increases
High PFM Threshold
~1.017*Vout
Low1 PFM Threshold
~1.006*Vout
PFET on
until
I_PFM limit
reached
NFET on
drains
conductor
current
until
I inductor=0
High PFM
Voltage
Threshold
reached,
go into
sleep mode
Low PFM
Threshold,
turn on
PFET
Current load
increases,
draws Vout
towards
Low2 PFM
Threshold
Low2 PFM Threshold
Vout
Low2 PFM Threshold,
switch back to PWMmode
PWM Mode at
Moderate to Heavy
Loads
Figure 8. Operation in PFM Mode and Transfer to PWM Mode
Soft Start
The DC-DC converter has a soft-start circuit that limits in-rush current during start-up. During start-up the switch
current limit is increased in steps. Soft start is activated only if EN_DCDC goes from logic low to logic high after
V_BATT reaches 2.7V. Soft start is implemented by increasing switch current limit in steps of 85mA, 170mA,
340mA and 1120mA (typical switch current limit). The start-up time thereby depends on the output capacitor and
load current demanded at start-up. Typical start-up times with a 10µF output capacitor and 750mA load is 455 µs
and with 1mA load is 180µs.
LINEAR REGULATOR OPERATION
In the typical post regulation application the power input voltage V_{IN_LIN} for the linear regulator is generated by
the DC-DC converter. Using a buck converter to reduce the battery voltage to a lower input voltage for the linear
regulator translates to higher efficiency and lower power dissipation.
It's also possible to operate the linear regulator independent of the DC-DC converter output voltage either from
V_BATT or a different source. In this case it's important that V_{IN_LIN} does not exceed V_BATT at any time. V_BATT is
needed for the linear regulator as well, it supplies internal circuitry.
An input capacitor of 1µF at V_{IN_LIN} needs to be added if no other filter or bypass capacitor is present in the
V_{IN_LIN} path.
Startup Mode
If the linear regulator is enabled (logic high at EN_LIN), the power input voltage V_{IN_LIN} is continuously compared
to the nominal output voltage of the linear regulator V_{OUT_LIN}.
If V_{IN_LIN} > V_{OUT_LIN(NOM)} + 200mV the main regulator is active, offering a rated output current of 350mA and
supplied by V_{IN_LIN}.
If V_{IN_LIN} < V_{OUT_LIN(NOM)} + 100mV the startup LDO is active, providing a reduced rated output current of 50mA
typical, supplied by V_BATT. Between these two levels a hystersis of 100mV is established. This feature is intended
to enable the supply of loads at the output of the linear regulator while the output of the DC-DC converter is still
ramping up.
In the typical post regulation application with both enable pins connected to V_BATT and V_{IN_LIN} supplied by
V_{OUT_DCDC} as an example, the linear regulator turns on in startup mode (I_MAX = 50mA) supplied out of V_BATT. At
the same time the DC-DC converter turns on, but V_{OUT_DCDC} startup time is longer. The internal signal 'Mode
Switch' monitors the voltage level of V_{IN_LIN}. Once V_{IN_LIN} > V_{OUT_LIN(NOM)} + 200mV, the linear regulator changes
to normal mode (I_MAX = 350mA) supplied out of V_{IN_LIN}. If V_{IN_LIN} drops below V_{OUT_LIN(NOM)} + 100mV the linear
regulator switches back to startup mode.
Copyright © 2007–2008, Texas Instruments Incorporated
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