LM3687 Datasheet, PDF (19/35 Pages) National Semiconductor (TI) – Step-Down DC-DC Converter with Integrated Low Dropout Regulator and Startup Mode

LM3687
www.ti.com
SNVS473A – DECEMBER 2007 – REVISED JULY 2008
The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the
load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and
synchronous rectifier at the SW pin to a low-pass filter formed by the inductor and output filter capacitor. The
output voltage is equal to the average voltage at the SW pin.
PWM Operation
During PWM (Pulse Width Modulation) operation the converter operates as a voltage-mode controller with input
voltage feed forward. This allows the converter to achieve good load and line regulation. The DC gain of the
power stage is proportional to the input voltage. To eliminate this dependency, feed forward inversely
proportional to the input voltage is introduced.
While in PWM mode, the output voltage is regulated by switching at a constant frequency and then modulating
the energy per cycle to control power to the load. At the beginning of each clock cycle the PFET switch is turned
on and the inductor current ramps up until the duty-cycle-comparator trips and the control logic turns off the
switch. The current limit comparator can also turn off the switch in case the current limit of the PFET is
exceeded. Then the NFET switch is turned on and the inductor current ramps down. The next cycle is initiated by
the clock turning off the NFET and turning on the PFET.
V_SW
V_BATT = 3.6V
V_OUT = 1.8V
I_L
V_OUT
2V/DIV
I_OUT = 500 mA
200 mA/DIV
2 mV/DIV
AC Coupled
TIME (200 ns/DIV)
Figure 6. Typical PWM Operation
Internal Synchronous Rectification
While in PWM mode, the DC-DC converter uses an internal NFET as a synchronous rectifier to reduce rectifier
forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in
efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier
diode.
Current Limiting
A current limit feature allows the LM3687 to protect itself and external components during overload conditions.
PWM mode implements current limiting using an internal comparator that trips at 1172 mA (typ). If the output is
shorted to ground the device enters a timed current limit mode where the NFET is turned on for a longer duration
until the inductor current falls below a low threshold. This allows the inductor current more time to decay, thereby
preventing runaway.
PFM Operation
At very light load, the DC-DC converter enters PFM mode and operates with reduced switching frequency and
supply current to maintain high efficiency. The part automatically transitions into PFM mode when either of two
conditions occurs for a duration of 32 or more clock cycles:
A. The NFET current reaches zero.
B. The peak PMOS switch current drops below the I_MODE level, (typically I_MODE < 36mA + V_BATT / 35Ω ).
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Links: LM3687
Submit Documentation Feedback
19