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TLC5943_17 Datasheet, PDF (27/40 Pages) Texas Instruments – 16-Channel, 16-Bit PWM LED Driver with 7-Bit Global Brightness Control
TLC5943
www.ti.com
SBVS101 – DECEMBER 2007
Noise Reduction
Large surge currents may flow through the IC and the printed circuit board (PCB) on which the device is mounted
if all 16 LED channels turn on simultaneously at the start of each grayscale cycle. These large current surges
could introduce detrimental noise and electromagnetic interference (EMI) into other circuits. The TLC5943 turns
on the LED channels in a series delay to provide a circuit soft-start feature. The output current sinks are grouped
into four groups of four channels each. The first group is OUT0,4,8,12; the second group is OUT1,5,9,13; the
third group is OUT2,6,10,14; and the fourth group is OUT3,7,11,15. Each group is turns on sequentially with a
small delay between groups; see Figure 11. Both turn-on and turn-off are delayed.
Continuous Base LED Open Detection
When the 33rd GSCLK goes high in the first display period after a BLANK falling edge, the LED open detection
(LOD) circuit checks the voltage of each constant current output (OUT0 through OUT15 = OUTn) that is turned
on to detect open LEDs and short LEDs to GND. Then, if the voltage of OUTn is less than the LED open
detection threshold (VLOD = 0.3 VTYP), it sets '1' as the error flag to the LOD error bit that corresponds with the
error channel in the Status Information Data (SID) register. Also, the XERR pin level moves from Hi-Z at the
same time. As a result, GS data should be over 1001h (4097d) to get the LOD result. The OUTn channel that
has the detected LOD error is forced off to avoid an increase in the VCC supply current. OUTn turns on at the first
GSCLK after a BLANK falling edge again. LOD data are kept until the next 33rd rising edge of GSCLK in the first
display period after a BLANK falling edge. LOD is always '0' when grayscale data are less than 1001h (4097d).
XERR is forced to a Hi-Z state while BLANK is high. When powered up, LOD data are not set to any default
value. Therefore, SID data must be used after OUTn turns on with over 1001h GS data. Figure 31 shows the
LED Open Detection timing.
BLANK
GSCLK
OUTn
(Data = FFFFh)
GND
SID Register Value
(Internal)
XERR
1234
30 31 32 33 34 35
65,534 65,536
65,533 65,535
1 2 3 30 31 32 33 34 35
OFF
1st GSCLK Period
ON
VOUTn
Old LED open detection data
'Hi-Z’
Low
('L')
OUTn is turned off by Auto Off
function if LOD error is detected
If no LOD error is detected
If the OUTn voltage (VOUT) is less than VLOD (0.3 V, typ) at the rising edge of the 33rd
GSCLK after the falling edge of BLANK, the LOD sets the SID bit corresponding
to the output channel in which LED is open or shorted to GND equal to ‘1.
New LED open detection data
If no LOD error is detected
Depends on LOD data
If LOD error is detected
This LED Open Detection (LOD) data are
kept until the next 33rd rising edge of
GSCLK after BLANK goes low.
Depends on previous
LOD data
Figure 31. LED Open Detection (LOD) Timing
Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): TLC5943
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