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| DRV8886AT Datasheet, PDF (27/40 Pages) Texas Instruments – 2-A Stepper Motor Driver With Integrated Current Sense and AutoTune Technology | |||
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DRV8886AT
SLVSDO1 â JANUARY 2017
Figure 25. Tri-Level Input Pin Diagram
The quad-level logic pin, DECAY, has the structure shown in Figure 26.
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Figure 26. Quad-Level Input Pin Diagram
7.3.11 Protection Circuits
The DRV8886AT device is fully protected against supply undervoltage, charge pump undervoltage, output
overcurrent, and device overtemperature events.
7.3.11.1 VM Undervoltage Lockout (UVLO)
If at any time the voltage on the VM pin falls below the VM undervoltage-lockout threshold voltage (VUVLO), all
MOSFETs in the H-bridge are disabled, the charge pump is disabled, the logic is reset, and the nFAULT pin is
driven low. Operation resumes when the VM voltage rises above the VUVLO threshold. The nFAULT pin is
released after operation resumes. Decreasing the VM voltage below this undervoltage threshold resets the
indexer position.
7.3.11.2 VCP Undervoltage Lockout (CPUV)
If at any time the voltage on the VCP pin falls below the charge-pump undervoltage-lockout threshold voltage
(VCPUV), all MOSFETs in the H-bridge are disabled and the nFAULT pin is driven low. Operation resumes when
the VCP voltage rises above the VCPUV threshold. The nFAULT pin is released after operation resumes.
7.3.11.3 Overcurrent Protection (OCP)
An analog current limit circuit on each MOSFET limits the current through the MOSFET by removing the gate
drive. If this analog current limit persists for longer than tOCP, all MOSFETs in the H-bridge are disabled and the
nFAULT pin is driven low.
Copyright © 2017, Texas Instruments Incorporated
Product Folder Links: DRV8886AT
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