DRV8886AT Datasheet, PDF (26/40 Pages) Texas Instruments – 2-A Stepper Motor Driver With Integrated Current Sense and AutoTune Technology

DRV8886AT
SLVSDO1 – JANUARY 2017
www.ti.com
7.3.9 Linear Voltage Regulators
An linear voltage regulator is integrated into the DRV8886AT device. The DVDD regulator can be used to provide
a reference voltage. For proper operation, bypass the DVDD pin to GND using a ceramic capacitor.
The DVDD output is nominally 3.3 V. When the DVDD LDO current load exceeds 1 mA, the output voltage drops
significantly.
The AVDD pin also requires a bypass capacitor to GND. This LDO is for DRV8886AT internal use only.
VM
+
±
DVDD 3.3-V, 1-mA
0.47 …F
VM
+
±
AVDD
0.47 …F
Figure 23. Linear Voltage Regulator Block Diagram
If a digital input must be tied permanently high (that is, Mx, DECAY or TRQ), tying the input to the DVDD pin
instead of an external regulator is preferred. This method saves power when the VM pin is not applied or in sleep
mode: the DVDD regulator is disabled and current does not flow through the input pulldown resistors. For
reference, logic level inputs have a typical pulldown of 100 kΩ, and tri-level inputs have a typical pulldown of 60
kΩ.
7.3.10 Logic and Multi-Level Pin Diagrams
Figure 24 shows the input structure for the logic-level pins STEP, DIR, ENABLE, nSLEEP, and M1.
DVDD
100 kŸ
Figure 24. Logic-Level Input Pin Diagram
The tri-level logic pins, M0 and TRQ, have the structure shown in Figure 25.
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