DDC114_14 Datasheet, PDF (27/37 Pages) Texas Instruments – Quad Current Input, 20-Bit Analog-To-Digital Converter

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Shielding Analog Signal Paths
As with any precision circuit, careful PCB layout ensures
the best performance. It is essential to make short, direct
interconnections and avoid stray wiring
capacitance—particularly at the analog input pins. Digital
signals should be kept as far from the analog input signals
as possible on the PCB.
Input shielding practices should be taken into
consideration when designing the circuit layout for the
DDC114. The inputs to the DDC114 are high impedance
and extremely sensitive to extraneous noise. Leakage
DDC114
SBAS255C − JUNE 2004 − REVISED APRIL 2009
currents between the PCB traces can exceed the input
bias current of the DDC114 if shielding is not implemented.
Figure 29 illustrates an acceptable approach to this
problem. A PC ground plane is placed around the inputs
of the DDC114. This shield helps minimize coupled noise
into the input pins.
This approach reduces leakage effects by surrounding
these sensitive pins with a low impedance analog ground.
Leakage currents from other portions of the circuit will flow
harmlessly to the low impedance analog ground rather
than into the analog input stage of the DDC114.
Digital I/O and Digital Power
48 47 46 45 44 43 42 41 40 39 38 37
1
36
2
35
3
34
4
33
5
32
6
31
DDC114
7
30
8
29
9
28
10
27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23 24
Analog
Ground
Analog
Ground
Analog
Ground
Analog Power
IN4
IN3
IN2
IN1
Analog Ground
Figure 29. Recommended Shield for DDC114 Layout Design
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