DDC112_15 Datasheet, PDF (26/34 Pages) Texas Instruments – Dual Current Input 20-Bit ANALOG-TO-DIGITAL CONVERTER

Input shielding practices should be taken into consideration
when designing the circuit layout for the DDC112. The inputs
to the DDC112 are high impedance and extremely sensitive
to extraneous noise. Leakage currents between the PCB
traces can exceed the input bias current of the DDC112 if
shielding is not implemented. Figure 30 illustrates an accept-
able approach to this problem. A PC ground plane is placed
around the inputs of the DDC112. This shield helps minimize
coupled noise into the input pins. Additionally, the pins that
are used for the external integration capacitors should be
guarded by a ground plane when the external capacitors are
used.
The approach above reduces leakage affects by surrounding
these sensitive pins with a low impedance analog ground.
Leakage currents from other portions of the circuit will flow
harmlessly to the low impedance analog ground rather than
into the analog input stage of the DDC112.
V_S+
10µF
V_DD+
10µF
AV_DD
0.1µF
DDC112
DV_DD
0.1µF
V_S+
10µF
< 10Ω
Separate +5V Supplies
0.1µF
AV_DD
DDC112
0.1µF
DV_DD
One +5V Supply
FIGURE 29. Power Supply Connection Options.
IN1
Analog
Ground
Shield
external
caps when
used
Analog
Power
Analog
Ground
1
28
2
27
3
26
4
25
5
24
6
23
7
22
DDC112U
8
21
9
20
10
19
11
18
12
17
13
16
14
15
IN2
Analog
Ground
Shield
external
caps when
used
Analog
Ground
Digital I/O
and
Digital Power
Digital I/O
and
Digital Power
FIGURE 30. Recommended Shield for DDC112U Layout
Design.
26
DDC112
www.ti.com
SBAS085B