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DAC8562 Datasheet, PDF (26/56 Pages) Analog Devices – +5 Volt, Parallel Input Complete 12-Bit DAC
DAC8562, DAC8563
DAC8162, DAC8163
DAC7562, DAC7563
SLAS719C – AUGUST 2010 – REVISED JUNE 2011
THEORY OF OPERATION
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DIGITAL-TO-ANALOG CONVERTER (DAC)
The DAC756x, DAC816x, and DAC856x architecture consists of two string DACs, each followed by an output
buffer amplifier. The devices include an internal 2.5-V reference with 4-ppm/°C temperature drift performance.
Figure 88 shows a principal block diagram of the DAC architecture.
Gain
Register
VREFIN/
VREFOUT
150 kW
150 kW
DIN n
DAC
Register
REF(+)
Resistor String
REF(-)
VOUT
GND
Figure 88. DAC Architecture
The input coding to the DAC756x, DAC816x, and DAC856x is straight binary, so the ideal output voltage is given
by Equation 1:
VO UT
= æ DIN ö
ç
è
2n
÷
ø
´
VREF
´ Gain
(1)
where:
n = resolution in bits; either 12 (DAC756x), 14 (DAC816x) or 16 (DAC856x)
DIN = decimal equivalent of the binary code that is loaded to the DAC register. DIN ranges from 0 to 2n – 1.
VREF = DAC reference voltage; either VREFOUT from the internal 2.5-V reference or VREFIN from an
aaa external reference.
Gain = 1 by default when internal reference is disabled (using external reference), and gain = 2 by default
aaa when using internal reference. Gain can also be manually set to either 1 or 2 using the gain register.
aaa See the GAIN REGISTERS section for more information.
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