TM4C1236D5PM Datasheet, PDF (249/1234 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1236D5PM Microcontroller
Register 10: Run-Mode Clock Configuration 2 (RCC2), offset 0x070
This register overrides the RCC equivalent register fields, as shown in Table 5-8, when the USERCC2
bit is set, allowing the extended capabilities of the RCC2 register to be used while also providing a
means to be backward-compatible to previous parts. Each RCC2 field that supersedes an RCC
field is located at the same LSB bit position; however, some RCC2 fields are larger than the
corresponding RCC field.
Table 5-8. RCC2 Fields that Override RCC Fields
RCC2 Field...
SYSDIV2, bits[28:23]
PWRDN2, bit[13]
BYPASS2, bit[11]
OSCSRC2, bits[6:4]
Overrides RCC Field
SYSDIV, bits[26:23]
PWRDN, bit[13]
BYPASS, bit[11]
OSCSRC, bits[5:4]
Important: Write the RCC register prior to writing the RCC2 register.
Run-Mode Clock Configuration 2 (RCC2)
Base 0x400F.E000
Offset 0x070
Type RW, reset 0x07C0.6810
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
USERCC2 DIV400 reserved
SYSDIV2
SYSDIV2LSB
reserved
Type RW
RW
RO
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved USBPWRDN PWRDN2 reserved BYPASS2
reserved
OSCSRC2
reserved
Type RO
RW
RW
RO
RW
RO
RO
RO
RO
RW
RW
RW
RO
RO
RO
RO
Reset
0
1
1
0
1
0
0
0
0
0
0
1
0
0
0
0
Bit/Field
31
Name
USERCC2
Type
RW
Reset
0
Description
Use RCC2
Value Description
0 The RCC register fields are used, and the fields in RCC2 are
ignored.
1 The RCC2 register fields override the RCC register fields.
30
DIV400
RW
0
Divide PLL as 400 MHz versus 200 MHz
This bit, along with the SYSDIV2LSB bit, allows additional frequency
choices.
Value Description
0 Use SYSDIV2 as is and apply to 200 MHz predivided PLL
output. See Table 5-5 on page 214 for programming guidelines.
1 Append the SYSDIV2LSB bit to the SYSDIV2 field to create a
7 bit divisor using the 400 MHz PLL output, see Table
5-6 on page 214.
June 12, 2014
249
Texas Instruments-Production Data