BQ24297 Datasheet, PDF (24/48 Pages) Texas Instruments – I2C Controlled 3A Single Cell USB Charger

bq24296
bq24297
SLUSBP6A – SEPTEMBER 2013 – REVISED OCTOBER 2013
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• Detect VBUS present and REG08[2]=1 (power good)
• Turn on D+ I_{DP_SRC} and the D– pull-down resistor R_{DM_DWN} for 40ms
• If the USB connector is properly attached, the D+ line goes from HIGH to LOW, wait up to 0.5 sec.
• Turn off I_{DP_SRC} and disconnect R_{DM_DWN}
The primary detection is used to distinguish between USB host (Standard Down Stream Port, or SDP) and
different type of charging ports (Charging Down Stream Port, or CDP, and Dedicated Charging Port, or DCP).
The protocol for primary detection is as follows:
• Turn on V_{DP_SRC} on D+ and I_{DM_SINK} on D– for 40ms
• If PD is attached to a USB host (SDP), the D– is low. If PD is attached to a charging port (CDP or DCP), the
D– is high
• Turn off V_{DP_SRC} and I_{DM_SINK}
Table 2 shows the input current limit setting after D+/D– detection.
Table 2. bq24297 USB D+/D– Detection
D+/D– DETECTION
0.5 sec timer expired in DCD
(D+/D- floating)
USB Host
USB Host
Charging Port
OTG
—
LOW
HIGH
—
INPUT CURRENT LIMIT
Proceed to Non-standard
adapter detection
100 mA
500 mA
3A
REG08[7:6]
00
01
01
10
When DCD 0.5 sec timer expires, the non-standard adapter detection is used to distinguish three different divider
bias conditions on D+/D- pins. When non-standard adapter is detected, the input current limit (REG0[2:0]) is set
based on the table shown below and REG08[7:6] is set to 10 (Adapter port). If non-standard adapter is not
detected, REG08[7:6] is set to 00 (Unknown) and the input current limit is set in REG0[2:0] to 500mA by default.
Table 3. bq24297 Non-Standard Adapter Detection
Non-Standard
Adapter
D+ Threshold
Divider 1
Divider 2
Divider 3
V_{adpt1_lo} < V_D+ < V_{adpt1_hi}
For VBUS=5V, typical range 2.4V < V_D+ < 3.1V
V_{adpt2_lo} < V_D+ < V_{adpt2_hi}
For VBUS=5V, typical range 0.85V < V_D+ < 1.5V
V_{adpt3_lo} < V_D+ < V_{adpt3_hi}
For VBUS=5V, typical range 2.4V > V_D+ or V_D+ >
3.1V
D- Threshold
V_{adpt1_lo} > V_D- or V_D- < V_{adpt1_hi}
For VBUS=5V, typical range 2.4V > V_D- or V_D- > 3.1V
NA
V_{adpt3_lo} < V_D- < V_{adpt3_hi}
For VBUS=5V, typical range 2.4V < V_D- < 3.1V
Input
Current
Limit
2A
2A
1A
PSEL/OTG Pins Set Input Current Limit
The bq24296 has PSEL instead of D+/D-. It directly takes the USB PHY device output to decide whether the
input is USB host or charging port.
PSEL
HIGH
HIGH
LOW
Table 4. bq24296 Input Current Limit Detection
OTG
LOW
HIGH
—
INPUT CURRENT LIMIT
100 mA
500 mA
3A
REG08[7:6]
01
01
10
24
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