THS1040_15 Datasheet, PDF (23/33 Pages) Texas Instruments – CMOS ANALOG-TO-DIGITAL CONVERTER

Not Recommended For New Designs
THS1040
SLAS290C − OCTOBER 2001 − REVISED OCTOBER 2004
PRINCIPLES OF OPERATION
power management
In power-sensitive applications (such as battery-powered systems) where the THS1040 is not required to
convert continuously, power can be saved between conversion intervals by placing the THS1040 into
power-down mode. This is achieved by pulling the STBY pin high. In power-down mode, the device typically
consumes less than 0.1 mW of power.
If the internal VREF generator (A1) is not required, it can be powered down by tying pin REFSENSE to AV_DD,
saving approximately 1.2 mA of supply current.
If the BIASREF function is not required when using internal references then tying MODE to AV_DD/2 powers the
BIASREF buffer down, saving approximately 1.2 mA.
digital I/O
While the OE pin is held low, ADC conversion results are output at pins D0 (LSB) to D9 (MSB). The ADC input
over-range indicator is output at pin OVR. OVR is also disabled when OE is held high.
The only ADC output data format supported is unsigned binary (output codes 0 to 1023). Twos complement
output (output codes −512 to 511) can be obtained by using an external inverter to invert the D9 output.
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