LMH6642_16 Datasheet, PDF (23/39 Pages) Texas Instruments – LMH664x Low Power, 130 MHz, 75 mA Rail-to-Rail Output Amplifiers

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LMH6642, LMH6643, LMH6644
SNOS966Q – MAY 2001 – REVISED SEPTEMBER 2014
Typical Application (continued)
9.2.1.1 Input and Output Topology
All input / output pins are protected against excessive voltages by ESD diodes connected to V⁺ and V^- rails (see
Figure 54). These diodes start conducting when the input / output pin voltage approaches 1V_be beyond V⁺ or V^-
to protect against over voltage. These diodes are normally reverse biased. Further protection of the inputs is
provided by the two resistors (R in Figure 54), in conjunction with the string of anti-parallel diodes connected
between both bases of the input stage. The combination of these resistors and diodes reduces excessive
differential input voltages approaching 2V_be. This occurs most commonly when the device is used as a
comparator (or with little or no feedback) and the device inputs no longer follow each other. In such a case, the
diodes may conduct. As a consequence, input current increases and the differential input voltage is clamped. It is
important to make sure that the subsequent current flow through the device input pins does not violate the
Absolute Maximum Ratings of the device. To limit the current through this protection circuit, extra series resistors
can be placed. Together with the built-in series resistors of several hundred ohms, these external resistors can
limit the input current to a safe number (that is, less than 10mA). Be aware that these input series resistors may
impact the switching speed of the device and could slow down the device.
9.2.1.2 Single Supply, Low Power Photodiode Amplifier
The circuit shown in Figure 55 is used to amplify the current from a photodiode into a voltage output. In this
circuit, the emphasis is on achieving high bandwidth and the transimpedance gain setting is kept relatively low.
Because of its high slew rate limit and high speed, the LMH664X family lends itself well to such an application.
This circuit achieves approximately 1V/mA of transimpedance gain and capable of handling up to 1mA_pp from the
photodiode. Q1, in a common base configuration, isolates the high capacitance of the photodiode (C_d) from the
Op Amp input in order to maximize speed. Input is AC coupled through C1 to ease biasing and allow single
supply operation. With 5V single supply, the device input/output is shifted to near half supply using a voltage
divider from V_CC. Note that Q1 collector does not have any voltage swing and the Miller effect is minimized. D1,
tied to Q1 base, is for temperature compensation of Q1’s bias point. Q1 collector current was set to be large
enough to handle the peak-to-peak photodiode excitation and not too large to shift the U1 output too far from
mid-supply.
No matter how low an R_f is selected, there is a need for C_f in order to stabilize the circuit. The reason for this is
that the Op Amp input capacitance and Q1 equivalent collector capacitance together (C_IN) will cause additional
phase shift to the signal fed back to the inverting node. C_f will function as a zero in the feedback path counter-
acting the effect of the C_IN and acting to stabilized the circuit. By proper selection of C_f such that the Op Amp
open loop gain is equal to the inverse of the feedback factor at that frequency, the response is optimized with a
theoretical 45° phase margin.
C_F = _{ SQRT (CIN)/(25bGBWP bRF)}
where
• GBWP is the Gain Bandwidth Product of the Op Amp
(1)
Optimized as such, the I-V converter will have a theoretical pole, f_p, at:
f_P = SQRT _{GBWP/(25RF bCIN)}
(2)
With Op Amp input capacitance of 3pF and an estimate for Q1 output capacitance of about 3pF as well, C_IN = 6
pF. From the typical performance plots, LMH6642/6643 family GBWP is approximately 57 MHz. Therefore, with
R_f = 1k, from Equation 1 and Equation 2:
C_f = ∼4.1 pF and f_p = 39 MHz
(3)
For this example, optimum C_f was empirically determined to be around 5 pF. This time domain response is
shown in Figure 58 below showing about 9 ns rise/fall times, corresponding to about 39 MHz for f_p. The overall
supply current from the +5 V supply is around 5 mA with no load.
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