LP3952 Datasheet, PDF (22/46 Pages) National Semiconductor (TI) – 6-Channel Color LED Driver with Audio Synchronization

LP3952
SNVS518A – JULY 2007 – REVISED MARCH 2013
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Peak Input Signal Level
Range vs Gain Setting
5.00
3.00
2.50
2.00
1.50
1.00
0.50
0.30
0.25
0.20
0.15
0.10
0.05
0 3 6 9 12 15 18 21
GAIN (dB)
RGB LED Blinking Control (1.65V ≤ V_DDIO ≤ V_DD1,2V) (unless otherwise noted)
LP3952 has a possibility to drive indicator LEDs with RGB1 outputs with programmable blinking time. Blinking
function is enabled with RGB_SEL[1:0] bits set as 01b in 0BH register. R1_CYCLE_EN, G1_CYCLE_EN and
B1_CYCLE_EN bits in cycle registers (02H, 04H and 06H) enable/disable blinking function for corresponding
output. When EN_BLINK bit is written high in register 11H, the blinking sequences for all outputs (which has
CYCLE_EN bit enabled) starts simultaneously. EN_BLINK bit should be written high after selecting wanted
blinking sequences and enabling CYCLE_EN bits, to synchronize outputs to get desired lighting effect. R1SW,
G1SW and B1SW bits can be used to enable and disable outputs when wanted.
RGB1 blinking sequence is set with R1, G1 and B1 blink registers (01H, 03H and 05H) by setting the appropriate
OFF-ON times. Blinking cycle times are set with R1_CYCLE[2:0], G1_CYCLE[2:0] and B1_CYCLE[2:0] bits in
R1, G1 and B1 CYCLE registers (02H, 04H and 06H). OFF/ON time is a percentage of the selected cycle time.
Values for setting OFF/ON time can be seen in following table.
Table 2. R1, G1 and B1 Blink Registers (01H, 03H and 05H):(1.65V ≤ V_DDIO ≤ V_DD1,2V) (unless otherwise
noted)
Name
R1_ON[3:0], R1_OFF[3:0]
G1_ON[3:0], G1_OFF[3:0]
B1_ON[3:0], B1_OFF[3:0]
Bit
7-4, 3-0
Description
RGB1 ON and OFF time
Bits
ON/OFF time
0000
0%
0001
1%
0010
2.5%
0011
5%
0100
7.5%
0101
10%
0110
15%
0111
20%
1000
30%
1001
40%
1010
50%
1011
60%
1100
70%
1101
80%
1110
90%
1111
100%
22
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