BQ4285E_14 Datasheet, PDF (22/31 Pages) Texas Instruments – Enhanced RTC With NVRAM Control

bq4285E/L
Power-Down/Power-Up Timing—bq4285E (TA = TOPR)
Symbol
Parameter
tF
VCC slew from 4.5V to 0V
tR
VCC slew from 0V to 4.5V
Minimum
300
100
Typical
-
-
tCSR
CS at VIH after power-up
20
-
tWPT
Write-protect time for
external RAM
10
16
tCER
Chip enable recovery time tCSR
-
tCED
Chip enable propagation
delay to external SRAM
-
7
Maximum
-
-
200
30
tCSR
10
Unit
µs
µs
ms
µs
ms
Conditions
Internal write-protection
period after VCC passes VPFD
on power-up.
Delay after VCC slows down
past VPFD before SRAM is
write-protected.
Time during which external
SRAM is write-protected after
VCC passes VPFD on power-up.
ns
Caution: Negative undershoots below the absolute maximum rating of -0.3V in battery-backup mode
may affect data integrity.
Power-Down/Power-Up Timing—bq4285E
22