AM3892BCYG120 Datasheet, PDF (215/308 Pages) Texas Instruments – AM389x Sitara™ ARM® Processors

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AM3894
AM3892
SPRS681E – OCTOBER 2010 – REVISED JULY 2012
8.8 General-Purpose Memory Controller (GPMC) and Error Locator Module (ELM)
The GPMC is a device memory controller used to provide a glueless interface to external memory devices
such as NOR Flash, NAND Flash (with BCH and Hamming Error Code Detection for 8-bit or 16-bit NAND
Flash), SRAM, and Pseudo-SRAM. It includes flexible asynchronous protocol control for interface to
SRAM-like memories and custom logic (FPGA, CPLD, ASICs, etc.).
The first section of GPMC memory (0x0 - 0x00FF_FFFF) is reserved for BOOTROM. Accessible memory
starts at location 0x0100_0000.
Other supported features include:
• 8-/16-bit wide multiplexed address/data bus
• Up to 6 chip selects with up to 256M-byte address space per chip select pin
• Non-multiplexed address/data mode
• Pre-fetch and write posting engine associated with system DMA to get full performance from NAND
device with minimum impact on NOR/SRAM concurrent access.
The device also contains an Error Locator Module (ELM) which is used to extract error addresses from
syndrome polynomials generated using a BCH algorithm. Each of these polynomials gives a status of the
read operations for a 512 bytes block from a NAND flash and its associated BCH parity bits, plus
optionally spare area information. The ELM has the following features:
• 4-bit, 8-bit, and 16-bit per 512-byte block error location based on BCH algorithms
• Eight simultaneous processing contexts
• Page-based and continuous modes
• Interrupt generation on error location process completion
– When the full page has been processed in page mode
– For each syndrome polynomial in continuous mode.
For more detailed information on the GPMC, see the GPMC chapter in the AM389x Sitara ARM
Processors Technical Reference Manual (literature number SPRUGX7).
8.8.1 GPMC and ELM Peripheral Register Descriptions
Table 8-52. GPMC Registers⁽¹⁾⁽²⁾
HEX ADDRESS
0x5000 0000
0x5000 0010
0x5000 0014
0x5000 0018
0x5000 001C
0x5000 0040
0x5000 0044
0x5000 0048
0x5000 0050
0x5000 0054
0x5000 0060 + (0x0000 0030 * i)
0x5000 0064 + (0x0000 0030 * i)
0x5000 0068 + (0x0000 0030 * i)
0x5000 006C + (0x0000 0030 * i)
ACRONYM
GPMC_REVISION
GPMC_SYSCONFIG
GPMC_SYSSTATUS
GPMC_IRQSTATUS
GPMC_IRQENABLE
GPMC_TIMEOUT_CONTROL
GPMC_ERR_ADDRESS
GPMC_ERR_TYPE
GPMC_CONFIG
GPMC_STATUS
GPMC_CONFIG1_0 -
GPMC_CONFIG1_5
GPMC_CONFIG2_0 -
GPMC_CONFIG2_5
GPMC_CONFIG3_0 -
GPMC_CONFIG3_5
GPMC_CONFIG4_0 -
GPMC_CONFIG4_5
REGISTER NAME
GPIO Revision
System Configuration
System Status
Status for Interrupt
Interrupt Enable
Timeout Counter Start Value
Error Address
Error Type
GPMC Global Configuration
GPMC Global Status
Parameter Configuration 1_0-5
Parameter Configuration 2_0-5
Parameter Configuration 3_0-5
Parameter Configuration 4_0-5
(1) i = 0 to 5.
(2) j = 0 to 8.
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