HD3SS3220 Datasheet, PDF (21/43 Pages) Texas Instruments – USB Type-C DRP Port Controller with SuperSpeed 2:1 MUX

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HD3SS3220
SLLSES1 – DECEMBER 2015
7.6.3 Connection Status and Control Register (offset = 0x09) [reset = 0x20]
Figure 7. Connection Status and Control Register
7
6
ATTACHED_STATE
5
CABLE_DIR
4
INTERRUPT
_STATUS
3
VCONN
_FAULT
R/U
R/U
R/U
R/U
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset, R/U = Read/Update
2
1
DRP_DUTY_CYCLE
R/W
0
DISABLE
_UFP_
ACCESSORY
R/W
Table 9. Connection Status Register Field Descriptions
Bit Field
7:6 ATTACHED_STATE
5
CABLE_DIR
4
INTERRUPT _STATUS
3
VCONN _FAULT
2:1 DRP_DUTY_CYCLE
0
DISABLE _UFP_ ACCESSORY
Type
R/U
Reset
2’b00
R/U
1’b0
R/U
1’b0
R/U
1’b0
R/W
2’b00
R/W
1’b0
Description
This is an additional method to communicate attach other than
the ID pin. These bits can be read by the application to
determine what was attached.
00 – Not Attached (Default)
01 – Attached.SRC (DFP)
10 – Attached.SNK (UFP)
11 – Attached to an Accessory
Cable orientation. The application can read these bits for cable
orientation information.
0 – CC2
1 – CC1 (Default)
The INT pin will be pulled low whenever a CSR changes. When
a CSR change has occurred this bit should be held at 1 until the
application clears teh bit.
0 – Clear 1 – Interrupt (When INT pulled low, this bit must be
1. This bit will be 1 whenever any CSR have been changed)
Bit is set whenever VCONN overcurrent limit is triggered.
0 – Clear
1 – VCONN fault is detected
Percentage of time that a DRP shall advertise DFP during t_DRP
00 – 30% default
01 – 40%
10 – 50%
11 – 60%
Setting this field will disable UFP accessory support
0 – UFP accessory support enabled (Default)
1 – UFP accessory support disabled
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