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DAC121C085CIMM Datasheet, PDF (21/34 Pages) Texas Instruments – 12-Bit Micro Power Digital-to-Analog Converter
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Input
Voltage
R
VZ
IZ
LM4050-4.1
or
LM4050-5.0
DAC121C081, DAC121C085
SNAS395D – DECEMBER 2007 – REVISED MARCH 2013
IDAC
0.47 PF
VA VREF
0.1 PF
DAC121C081/5 VOUT = 0V to 5V
SDA
SCL
Figure 28. The LM4050 as a power supply
The minimum resistor value in the circuit of Figure 28 must be chosen such that the maximum current through
the LM4050 does not exceed its 15 mA rating. The conditions for maximum current include the input voltage at
its maximum, the LM4050 voltage at its minimum, and the DAC121C081 drawing zero current. The maximum
resistor value must allow the LM4050 to draw more than its minimum current for regulation plus the maximum
DAC121C081 current in full operation. The conditions for minimum current include the input voltage at its
minimum, the LM4050 voltage at its maximum, the resistor value at its maximum due to tolerance, and the
DAC121C081 draws its maximum current. These conditions can be summarized as
R(min) = ( VIN(max) − VZ(min) ) /IZ(max)
(3)
and
R(max) = ( VIN(min) − VZ(max) ) / ( (IDAC(max) + IZ(min) )
(4)
where VZ(min) and VZ(max) are the nominal LM4050 output voltages ± the LM4050 output tolerance over
temperature, IZ(max) is the maximum allowable current through the LM4050, IZ(min) is the minimum current
required by the LM4050 for proper regulation, and IDAC(max) is the maximum DAC121C081 supply current.
LP3985
The LP3985 is a low noise, ultra low dropout voltage regulator with a 3% accuracy over temperature. It is a good
choice for applications that do not require a precision reference for the DAC121C081. It comes in 3.0V, 3.3V and
5V versions, among others, and sports a low 30 µV noise specification at low frequencies. Since low frequency
noise is relatively difficult to filter, this specification could be important for some applications. The LP3985 comes
in a space-saving 5-pin SOT-23 and 5-bump DSBGA packages.
Input
Voltage
1 PF
LP3985
0.01 PF
0.1 PF
VA VREF
0.1 PF
DAC121C081/5 VOUT = 0V to 5V
SDA
SCL
Figure 29. Using the LP3985 regulator
An input capacitance of 1.0µF without any ESR requirement is required at the LP3985 input, while a 1.0µF
ceramic capacitor with an ESR requirement of 5mΩ to 500mΩ is required at the output. Careful interpretation
and understanding of the capacitor specification is required to ensure correct device operation.
Copyright © 2007–2013, Texas Instruments Incorporated
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Product Folder Links: DAC121C081 DAC121C085