THS3092_14 Datasheet, PDF (20/45 Pages) Texas Instruments – HIGH-VOLTAGE, LOW-DISTORTION, CURRENT-FEEDBACK OPERATIONAL AMPLIFIERS

THS3092
THS3096
SLOS428B – DECEMBER 2003 – REVISED FEBRUARY 2006
715 Ω
178 Ω
24.9 Ω
V_S
_
+
−V_S
715 Ω
5.11 Ω
V_S
V_S
1 nF
178 Ω
_
5.11 Ω
+
24.9 Ω
−V_S
Figure 63.
Figure 64 shows a push-pull FET driver circuit typical
of ultrasound applications with isolation resistors to
isolate the gate capacitance from the amplifier.
V_S
V_S
+
5.11 Ω
_
−V_S
604 Ω
133 Ω
604 Ω
V_S
_
5.11 Ω
+
−V_S
−V_S
Figure 64. PowerFET Drive Circuit
SAVING POWER WITH POWER-DOWN
FUNCTIONALITY AND SETTING
THRESHOLD LEVELS WITH THE
REFERENCE PIN
The THS3096 features a power-down pin (PD) which
lowers the quiescent current from 9.5 mA down to
500 µA, ideal for reducing system power.
The power-down pin of the amplifier defaults to the
positive supply voltage in the absence of an applied
voltage, putting the amplifier in the power-on mode of
operation. To turn off the amplifier in an effort to
conserve power, the power-down pin can be driven
towards the negative rail. The threshold voltages for
power-on and power-down are relative to the supply
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rails and are given in the specification tables. Above
the Enable Threshold Voltage, the device is on.
Below the Disable Threshold Voltage, the device is
off. Behavior in between these threshold voltages is
not specified.
Note that this power-down functionality is just that;
the amplifier consumes less power in power-down
mode. The power-down mode is not intended to
provide a high-impedance output. In other words, the
power-down functionality is not intended to allow use
as a 3-state bus driver. When in power-down mode,
the impedance looking back into the output of the
amplifier is dominated by the feedback and gain
setting resistors, but the output impedance of the
device itself varies depending on the voltage applied
to the outputs.
Figure 65 shows the total system output impedance
which includes the amplifier output impedance in
parallel with the feedback plus gain resistors, which
cumulate to 2420 Ω. Figure 52 shows this circuit
configuration for reference.
2500
V_S = ±15 V and ±5 V
2000
1500
1000
1.21 kΩ 1.21 kΩ
500
−
50 Ω ^VO
+
0
100 k
1M
10 M
100 M 1 G
f − Frequency − Hz
Figure 65. Power-down Output Impedance vs
Frequency
As with most current feedback amplifiers, the internal
architecture places some limitations on the system
when in power-down mode. Most notably is the fact
that the amplifier actually turns ON if there is a ±0.7 V
or greater difference between the two input nodes
(V+ and V–) of the amplifier. If this difference
exceeds ±0.7 V, the output of the amplifier creates an
output voltage equal to approximately
[(V+ – V–) – 0.7 V] × Gain. This also implies that if a
voltage is applied to the output while in power-down
mode, the V- node voltage is equal to
V_O(applied) × R_G/(R_F + R_G). For low gain configurations
and a large applied voltage at the output, the
amplifier may actually turn ON due to the
aforementioned behavior.
The time delays associated with turning the device on
20
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