SN74BCT979 Datasheet, PDF (2/10 Pages) Texas Instruments – 9-BIT REGISTERED BTL TRANSCEIVER WITH PARITY GENERATOR/CHECKER

SN74BCT979
9ĆBIT REGISTERED BTL TRANSCEIVER
WITH PARITY GENERATOR/CHECKER
SCBS115A − OCTOBER 1990 − REVISED NOVEMBER 1993
FUNCTION TABLE
INPUTS
OEAB OEBA SEL LEAB LEBA
OPERATION OR FUNCTION†
H
H
X
X
X Isolation. AO1 −AO8 /APARO are in the high-impedance state and B1 −B8 /APAR are high.
H
L
L
X
H
Parity is generated from B1 −B8 data and output on APARO and is checked against BPAR and
output on ERRB.
Parity is generated from latched B1 −B8 data and output on APARO and is checked against BPAR
H
L
L
X
L _{and output on ERRB.}
H
L
H
X
H
BPAR is output on APARO. Parity is generated from B1 −B8 data, checked against BPAR, and
output on ERRB.
H
L
H
X
L
BPAR is output on APARO. Parity is generated from latched B1 −B8 data, checked against BPAR,
and output on ERRB.
Parity is generated from AI1 −AI8 data and output on BPAR and is checked against APARI and
L
H
L
H
X _{output on ERRA.}
L
H
L
L
X
Parity is generated from latched AI1 −AI8 data and output on BPAR and is checked against APARI
and output on ERRA.
L
H
H
H
X
APARI is output on BPAR. Parity is generated from AI1 −AI8 data, checked against APARI, and
output on ERRA.
L
H
H
L
X
APARI is output on BPAR. Parity is generated from latched AI1 −AI8 data, checked against APARI,
and output on ERRA.
L
L
X
X
X AO1 −AO8 /APARO and B1 −B8 /BPAR are active (high or low logic levels).
† _{Parity is generated from AI1 −AI8 and from B1 − B8 based on the level present at ODD/EVEN. Parity is checked (AI1 − AI8 against APARI and}
B1 −B8 against BPAR) based on the level present at ODD/EVEN (see parity function table).
PARITY FUNCTION TABLE‡
INPUTS
OUTPUTS
OEAB
SEL
ODD/EVEN
Σ OF INPUTS
AI1 −AI8 = H
APARI
BPAR ERRA
L
L
L
0, 2, 4, 6, 8
L
L
H
L
L
L
1, 3, 5, 7
L
H
L
L
L
L
0, 2, 4, 6, 8
H
L
L
L
L
L
1, 3, 5, 7
H
H
H
L
L
H
0, 2, 4, 6, 8
L
H
L
L
L
H
1, 3, 5, 7
L
L
H
L
L
H
0, 2, 4, 6, 8
H
H
H
L
L
H
1, 3, 5, 7
H
L
L
L
H
L
0, 2, 4, 6, 8
L
L
H
L
H
L
1, 3, 5, 7
L
L
L
L
H
L
0, 2, 4, 6, 8
H
H
L
L
H
L
1, 3, 5, 7
H
H
H
L
H
H
0, 2, 4, 6, 8
L
L
L
L
H
H
1, 3, 5, 7
L
L
H
L
H
H
0, 2, 4, 6, 8
H
H
H
L
H
H
1, 3, 5, 7
H
H
L
H
X
X
X
X
H
X
‡ _{Parity functions for the A bus are shown. Parity functions for the B bus are}
similar, but use B1 −B8 and BPAR as inputs and APARO and ERRB as outputs.
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