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CD74HC652_15 Datasheet, PDF (2/13 Pages) Texas Instruments – High-Speed CMOS Logic Octal-Bus Transceiver/Registers, Three-State | |||
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CD74HC652, CD74HCT652
Functional Diagram
4
A0
5
A1
6
A2
7
A
A3
DATA
8
PORT A4
9
A5
10
A6
11
A7
20
B0
19
B1
18
B2
17
B3 B
16
DATA
B4 PORT
15
B5
14
B6
13
B7
21
OEBA 3
OEAB 1
FLIP-FLOP
CLOCKS
CAB CLOCK
23
CBA CLOCK
DATA
SOURCE
SELECTION
INPUTS
2
SAB SOURCE
22
SBA SOURCE
GND = PIN 12
VCC = PIN 24
FUNCTION TABLE
INPUTS
DATA I/O
OPERATION OR FUNCTION
OEAB
L
OEBA
H
CAB
H or L
CBA
H or L
SAB
X
SBA
X
A0 THRU A7
Input
B0 THRU B7
Input
651
Isolation (Note 1)
652
Isolation (Note 1)
L
H
â
â
X
X
Store A and B Data Store A and B Data
X
H
â
H or L
X
X
Input
Unspecified
(Note 2)
Store A, Hold B
Store A, Hold B
H
H
â
â
X
X
(Note 3)
Input
Output
Store A in Both
Registers
Store A in Both
Registers
L
X
H or L
â
X
X
Unspecified
Input
Hold A, Store B
Hold A, Store B
(Note 2)
L
L
â
â
X
X
Output
(Note 3)
Input
Store B in Both
Registers
Store B in Both
Registers
L
L
X
X
X
L
Output
Input
Real-Time B Data to Real-Time B Data to
A Bus
A Bus
L
L
X
H or L
X
H
Stored B Data to A Stored B Data to A
Bus
Bus
H
H
X
X
L
X
Input
Output
Real-Time A Data to Real-Time A Data to
B Bus
B Bus
H
H
H or L
X
H
X
Stored A Data to B Stored A Data to B
Bus
Bus
H
L
H or L H or L
H
H
Output
Output
Stored A Data to B Stored A Data to B
Bus and
Bus
Stored B Data to A Stored B Data to A
Bus
Bus
NOTES:
1. To prevent excess currents in the High-Z (isolation) modes, all I/O terminals should be terminated with 10k⦠to 1M⦠resistors.
2. The data output functions may be enabled or disabled by various signals at the OEAB or OEBA inputs. Data input functions are always
enabled; i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs.
3. Select Control = L: Clocks can occur simultaneously.
Select Control = H: Clocks must be staggered in order to load both registers.
2
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