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LM3450 Datasheet, PDF (19/40 Pages) National Semiconductor (TI) – LED Driver with Active Power Factor Correction and Phase Dimming Decoder
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LM3450
SNVS681D – NOVEMBER 2010 – REVISED MAY 2013
VCC
RAC1
Rectified AC
RAC2
0-3V
Analog
Input
RPB
VSB
OPTO
VAC VREF VADJ
ANGLE
DEMOD
3V
REF
500 Hz
DIM
-
+
PWM OUT
RSB
DIN
SAMPLE / REMAP DOUT
DOUT
DIN
Transition
FLT2
500k FLT1
LM3450/50A
RF1
CF1
RF2
CF2
Figure 26. Dimming Decoder Circuit
PHASE DIMMING DECODER
The LM3450/50A uses the rectified AC line voltage to interpret the conduction angle. Figure 26 shows the
LM3450/50A decoder circuit with associated external circuitry. The rectified AC line voltage is scaled via a
resistor divider (RAC1, RAC2) and connected to the VAC pin. VAC is compared to a 356mV reference to generate a
twice line frequency PWM signal with corresponding duty cycle as shown in Figure 27.
356 mV
VAC
DIN
Figure 27. Phase Angle Demodulation
For best results, RAC1 and RAC2 are suggested to be sized so that the VAC voltage crosses the 356mV threshold
when the rectified AC line is as follows:
• 120V systems: 25V to 45V
• 230V systems: 40V to 70V
The demodulated duty cycle is sampled and logarithmically remapped to a 300Hz PWM signal improving the
resolution of low dimming levels to the human eye. A minimum duty cycle limits the maximum achievable
contrast ratio to approximately 70:1. The remapped PWM signal is buffered and output at FLT1 with amplitude
equal to VADJ as shown in Figure 28.
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