TM4C1231D5PZ Datasheet, PDF (185/1161 Pages) Texas Instruments – Universal Asynchronous Receiver/Transmitter Run Mode Clock

Tiva^™ TM4C1231D5PZ Microcontroller _{(identical to LM4F112C4QC)}
Bit/Field
4
3
2
1
0
Name
HFRDY
THREAD
reserved
USER
LSPACT
Type
R/W
R/W
RO
R/W
R/W
Reset
0
0
0
0
0
Description
Hard Fault Ready
When set, priority permitted setting the HardFault handler to the pending
state when the floating-point stack frame was allocated.
Thread Mode
When set, mode was Thread Mode when the floating-point stack frame
was allocated.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
User Privilege Level
When set, privilege level was user when the floating-point stack frame
was allocated.
Lazy State Preservation Active
When set, Lazy State preservation is active. Floating-point stack frame
has been allocated but saving state to it has been deferred.
July 16, 2013
185
Texas Instruments-Production Data