TLC5954 Datasheet, PDF (18/45 Pages) Texas Instruments – TLC5954 48-Channel, Constant-Current LED Driver with Global Brightness Control, LED Open-Short Detection, and Power-Save Mode

TLC5954
SBVS241 – APRIL 2014
www.ti.com
8.3 Feature Description
8.3.1 Output Current Calculation
The output current value controlled by MC and BC can be calculated by Equation 1.
I_OUTn (mA) = I_OLCMax (mA) ´
0.06 + 0.94 ´
BCX
127
where:
• I_OLCMax = the maximum constant-current value for all OUTXn for each color group programmed by MC data,
• BCX = the global brightness control value (0h to 7Fh),
• X = R, G, or B for the red, green, or blue color group, and
• n = 0 to 15.
(1)
Each output sinks the I_OLCMax current when they turn on and the global brightness control (BC) data are set to the
maximum value of 7Fh (127d).
8.3.2 Status Information Data (SID)
The status information data (SID) contains the status of the LED open detection (LOD) and LED short detection
(LSD).
When the output on-off data latch is written, the SID selected by the SIDLD bits are loaded into lower 48 bits in
the common shift register at the LAT rising edge after the original data in the common shift register are copied to
the on-off data latch. When the BC and FC data are written, SID data are not loaded to the common shift
register. After SID data are copied into the common shift register, new SID data are not loaded until new data are
written into the common shift register even if a LAT rising edge is input.
When the device resumes normal operation after the power-save mode, a BLANK rising edge must be input after
t_SU2 or t_SU3 elapses in order to retain correct LOD and LSD data in the SID holder because the SID analog circuit
does not function during power-save mode. The SID load configuration and SID read timing are shown in
Figure 27 and Figure 28, respectively.
Selected SID (48 bits) by SIDLD data in the function control data latch.
Selected Selected Selected Selected Selected
SID for SID for SID for SID for SID for
OUTB15 OUTG15 OUTR15 OUTB14 OUTG14
Selected Selected Selected Selected Selected Selected
SID for SID for SID for SID for SID for SID for
OUTB1 OUTG1 OUTR1 OUTB0 OUTG0 OUTR0
SOUT
Bit 48
(0)
MSB
Bit 47
Bit 46 Bit 45
Bit 44 Bit 43
Bit 5
Bit4
Bit 3
Bit 2
Bit 1
Bit 0
LSB
Common Shift Register (49 bits)
Figure 27. SID Load Configuration
Selected SID by FC data
are loaded to the lower
48 bits of the common
shift register when the
LAT rising edge is input
with 0 MSB data of the
common shift register.
SIN
SCK
18
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