SN74AVCH16T245_15 Datasheet, PDF (18/30 Pages) Texas Instruments – 16-Bit Dual-Supply Bus Transceiver

SN74AVCH16T245
SCES587D – AUGUST 2004 – REVISED NOVEMBER 2015
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Typical Application (continued)
10.2.1 Design Requirements
This device uses drivers which are enabled depending on the state of the DIR pin. The designer must know the
intended flow of data and take care not to violate any of the high or low logic levels. Unused data inputs are must
not be floating, as this can cause excessive internal leakage on the input CMOS structure. Tie any unused input
and output ports directly to ground.
For this design example, use the parameters listed in Table 3.
Table 3. Design Parameters
DESIGN PARAMETER
Input voltage range
Output voltage range
EXAMPLE VALUE
1.2 V to 3.6 V
1.2 V to 3.6 V
10.2.2 Detailed Design Procedure
To begin the design process, determine the following:
10.2.2.1 Input Voltage Ranges
Use the supply voltage of the device that is driving the SN74AVCH16T245 device to determine the input voltage
range. For a valid logic high the value must exceed the V_IH of the input port. For a valid logic low the value must
be less than the V_IL of the input port.
10.2.2.2 Output Voltage Range
Use the supply voltage of the device that the SN74AVCH16T245 device is driving to determine the output
voltage range.
10.2.3 Application Curve
Input (1.2 V)
Output (3.3 V)
Figure 13. Translation Up (1.2 V to 3.3 V) at 2.5 MHz
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