LP3958 Datasheet, PDF (18/36 Pages) National Semiconductor (TI) – Lighting Management Unit with High Voltage Boost Converter

LP3958
SNVS423C – JANUARY 2006 – REVISED MARCH 2013
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6. Fading will be done either within 0.65s or 1.3s based on SLOPE selection
Fading times apply to full scale change i.e. from 0 to 100% or vice versa. If the current change does not
correspond to full scale change, the time will be respectively shorter. See WLED Dimming diagrams for typical
fade times.
Name
SLOPE
FADE_SEL
EN_FADE
DISPL
EN_MAIN
EN_SUB
WLED CONTROL REGISTER (03H)
Bit
Description ⁽¹⁾
5
FADE execution time:
0 = 1.3s (full scale)
1 = 0.65s (full scale)
4
FADE selection:
0 = FADE controls MAIN
1 = FADE controls SUB
3
FADE enable
0 = FADE disabled
1 = FADE enabled
2
Display mode:
0 = MAIN and SUB individual control
1 = MAIN and SUB controlled with MAIN DAC
1
MAIN enable:
0 = disable
1 = enable
0
SUB enable:
0 = disable
1 = enable
(1) If DISPL=1 and FADE_SEL=0 then FADE effects MAIN and SUB
Adjustment is made with 04H (main current) and with 05H (sub current) registers:
MAIN CURRENT [7:0]
SUB CURRENT [7:0]
0000 0000
0000 0001
0000 0010
0000 0011
…
…
1111 1101
1111 1110
1111 1111
Driver current,
mA (typical)
0
0.1
0.2
0.3
…
…
25.3
25.4
25.5
Backlight Driver Electrical Characteristics
Symbol
I_MAX
I_LEAKAGE
I_MAIN
I_SUB
Match_MAIN-
SUB
Match_MAIN-
SUB
V_SAT
Parameter
Maximum Sink Current
Leakage Current
MAIN Current tolerance
SUB Current tolerance
Sink Current Matching Error⁽¹⁾
Sink Current Matching Error
95% Saturation Voltage
Test Conditions
V_{SUB, MAIN} =18V
I_MAIN and I_SUB set to 12.8mA (80H)
I_SINK=12.8mA, DISPL=1
I_SINK=12.8mA, DISPL=0
I_SINK=25mA
(1) Matching is the maximum difference from the average.
Min
Typ
Max
Unit
25.5
30
mA
0.03
1
µA
11.1
12.8
14.1
mA
0.2
%
5
%
400
600
mV
800
18
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