LP38690-ADJ_16 Datasheet, PDF (18/27 Pages) Texas Instruments – 1-A Low Dropout CMOS Linear Regulator

LP38690-ADJ, LP38692-ADJ
SNVS323I – DECEMBER 2004 – REVISED FEBRUARY 2016
10.2 Layout Examples
Thermal Vias
GND
EN ADJ OUT IN
C_OUT
GND
C_IN
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V_IN
1
C_OUT
2
GND
3
V_EN
Thermal Vias
6
V_OUT
5
4
R1
C_OUT
R2
R2
V_OUT V_IN
R1
Figure 33. LP38692-ADJ SOT-223 Package
Figure 34. LP3869x-ADJ WSON Package
10.3 WSON Mounting
The NGG0006A (No Pullback) 6-lead WSON package requires specific mounting techniques which are detailed
in AN-1187 Leadless Leadframe Package (LLP), SNOA401. The pad style which to use with the WSON package
is the NSMD (non-solder mask defined) type. Additionally, TI recommends the PCB terminal pads to be 0.2 mm
longer than the package pads to create a solder fillet to improve reliability and inspection.
The input current is split between two IN pins, 1 and 6. The two IN pins must be connected together to ensure
that the device can meet all specifications at the rated current.
The thermal dissipation of the WSON package is directly related to the printed circuit board construction and the
amount of additional copper area connected to the DAP.
The DAP (exposed pad) on the bottom of the WSON package is connected to the die substrate with a conductive
die attach adhesive. The DAP has no direct electrical (wire) connection to any of the pins. There is a parasitic PN
junction between the die substrate and the device ground. As such, it is strongly recommend that the DAP be
connected directly to the ground at device lead 2 (that is, GND). Alternately, but not recommended, the DAP may
be left floating (that is, no electrical connection). The DAP must not be connected to any potential other than
ground.
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