LP38690-ADJ_16 Datasheet, PDF (16/27 Pages) Texas Instruments – 1-A Low Dropout CMOS Linear Regulator

LP38690-ADJ, LP38692-ADJ
SNVS323I – DECEMBER 2004 – REVISED FEBRUARY 2016
www.ti.com
8.2.2.4 Output Noise
Noise is specified in two ways: Spot Noise or Output Noise Density is the RMS sum of all noise sources,
measured at the regulator output, at a specific frequency (measured with a 1-Hz bandwidth). This type of noise is
usually plotted on a curve as a function of frequency. Total Output Noise or Broad-Band Noise is the RMS sum
of spot noise over a specified bandwidth, usually several decades of frequencies.
Attention must be given to the units of measurement. Spot noise is measured in units µV/√Hz or nV/√Hz and total
output noise is measured in µV_RMS
The primary source of noise in low-dropout regulators is the internal reference. Noise can be reduced in two
ways: by increasing the transistor area or by increasing the current drawn by the internal reference. Increasing
the area decreases the chance of fitting the die into a smaller package. Increasing the current drawn by the
internal reference increases the total supply current (GND pin current).
8.2.2.5 Power Dissipation
Knowing the device power dissipation and proper sizing of the thermal plane connected to the tab or pad is
critical to ensuring reliable operation. Device power dissipation depends on input voltage, output voltage, and
load conditions and can be calculated with Equation 2.
P_D(MAX) = (V_IN(MAX) – V_OUT) × I_OUT
(2)
Power dissipation can be minimized, and greater efficiency can be achieved, by using the lowest available
voltage drop option that would still be greater than the dropout voltage (V_DO). However, keep in mind that higher
voltage drops result in better dynamic (that is, PSRR and transient) performance.
On the WSON (NGD) package, the primary conduction path for heat is through the exposed power pad to the
PCB. To ensure the device does not overheat, connect the exposed pad, through thermal vias, to an internal
ground plane with an appropriate amount of copper PCB area.
On the SOT-223 (NDC) package, the primary conduction path for heat is through the pins to the PCB.
Power dissipation and junction temperature are most often related by the junction-to-ambient thermal resistance
(R_θJA) of the combined PCB and device package and the temperature of the ambient air (T_A), according to
Equation 3 or Equation 4:
T_J(MAX) = T_A(MAX) + ( R_θJA × P_D(MAX))
(3)
P_D = T_J(MAX) – T_A(MAX) / R_θJA
(4)
Unfortunately, this R_θJA is highly dependent on the heat-spreading capability of the particular PCB design, and
therefore varies according to the total copper area, copper weight, and location of the planes. The R_θJA recorded
in Thermal Information is determined by the specific EIA/JEDEC JESD51-7 standard for PCB and copper-
spreading area, and is to be used only as a relative measure of package thermal performance. For a well-
designed thermal layout, R_θJA is actually the sum of the package junction-to-case (bottom) thermal resistance
(R_θJCbot) plus the thermal resistance contribution by the PCB copper area acting as a heat sink.
8.2.2.6 Estimating Junction Temperature
The EIA/JEDEC standard recommends the use of psi (Ψ) thermal characteristics to estimate the junction
temperatures of surface mount devices on a typical PCB board application. These characteristics are not true
thermal resistance values, but rather package specific thermal characteristics that offer practical and relative
means of estimating junction temperatures. These psi metrics are determined to be significantly independent of
copper-spreading area. The key thermal characteristics (Ψ_JT and Ψ_JB) are given in Thermal Information and are
used in accordance with Equation 5 or Equation 6.
T_J(MAX) = T_TOP + (Ψ_JT × P_D(MAX))
where
• P_D(MAX) is explained in Equation 4
• T_TOP is the temperature measured at the center-top of the device package.
(5)
T_J(MAX) = T_BOARD + (Ψ_JB × P_D(MAX))
where
• P_D(MAX) is explained in Equation 4.
• T_BOARD is the PCB surface temperature measured 1-mm from the device package and centered on the
package edge.
(6)
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