BQ4285_14 Datasheet, PDF (18/29 Pages) Texas Instruments – Real-Time Clock (RTC) With NVRAM Control

bq4285
Power-Down/Power-Up Timing (TA = TOPR)
Symbol
Parameter
Minimum
tF
VCC slew from 4.5V to 0V
300
tR
VCC slew from 0V to 4.5V
100
tCSR
CS at VIH after power-up
20
Typical
-
-
-
tWPT Write-protect time for
10
6
external RAM
tCER
Chip enable recovery
tCSR
-
time
tCED
Chip enable propagation
-
7
delay to external SRAM
Maximum
-
-
200
30
tCSR
10
Unit
µs
µs
ms
µs
ms
ns
Conditions
Internal write-protection
period after VCC passes VPFD
on power-up.
Delay after VCC slews down
past VPFD before SRAM is
write-protected.
Time during which external
SRAM is write-protected after
VCC passes VPFD on power-up.
Caution: Negative undershoots below the absolute maximum rating of -0.3V in battery-backup mode
may affect data integrity.
Power-Down/Power-Up Timing
18