THS4021_16 Datasheet, PDF (17/29 Pages) Texas Instruments – 350-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS

THS4021
THS4022
www.ti.com
SLOS265C – SEPTEMBER 1999 – REVISED JULY 2007
The next consideration is the package constraints. The two sources of heat within an amplifier are quiescent
power and output power. The designer should never forget about the quiescent heat generated within the device,
especially with multiamplifier devices. Because these devices have linear output stages (Class A-B), most of the
heat dissipation is at low output voltages with high output currents. Figure 40 through Figure 43 show this effect,
along with the quiescent heat, with an ambient air temperature of 50°C. Obviously, as the ambient temperature
increases, the limit lines shown drop accordingly. The area under each respective limit line is considered the safe
operating area. Any condition above this line exceeds the amplifier limits and failure may result. When using V_CC
= ±5 V, there is generally not a heat problem, even with SOIC packages. But, when using V_CC = ±15 V, the SOIC
package is severely limited in the amount of heat it can dissipate. The other key factor when looking at these
graphs is how the devices are mounted on the PCB. The PowerPAD devices are extremely useful for heat
dissipation. But the device should always be soldered to a copper plane to use fully the heat dissipation
properties of the thermal pad. The SOIC package, on the other hand, is highly dependent on how it is mounted
on the PCB. As more trace and copper area is placed around the device, θ_JA decreases and the heat dissipation
capability increases. The currents and voltages shown in these graphs are for the total package. For the
dual-amplifier package (THS4022), the sum of the RMS output currents and voltages should be used to choose
the proper package. The graphs shown assume that both amplifier outputs are identical.
THS4021
MAXIMUM RMS OUTPUT CURRENT
vs
RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS
200
V_CC = ± 5 V
180 ^Tj ^{= 150°C}
T_A = 50°C
160
Maximum Output
Current Limit Line
140
120
100
80
SO-8 Package
θ_JA = 167°C/W
60 Low-K Test PCB
Package With
θ_JA < = 120°C/W
40
20
0
0
Safe Operating
Area
1
2
3
4
|V_O| − RMS Output Voltage − V
Figure 40.
5
G030
THS4021
MAXIMUM RMS OUTPUT CURRENT
vs
RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS
1k
T_J = 150°C
T_A = 50°C
V_CC = ± 15 V
DGN Package
θ_JA = 58.4°C/W
Maximum Output
Current Limit Line
100
10
0
SO-8 Package
θ_JA = 167°C/W
Low-K Test PCB
SO-8 Package
θ_JA = 98°C/W
High-K Test PCB
Safe Operating
Area
3
6
9
12
|V_O| − RMS Output Voltage − V
Figure 41.
15
G031
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Product Folder Link(s): THS4021 THS4022